From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5757DC4CECE for ; Fri, 13 Mar 2020 13:23:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 25B33206BE for ; Fri, 13 Mar 2020 13:23:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="KcGx3Vt7" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726834AbgCMNXR (ORCPT ); Fri, 13 Mar 2020 09:23:17 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:34451 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726495AbgCMNXQ (ORCPT ); Fri, 13 Mar 2020 09:23:16 -0400 Received: by mail-pf1-f196.google.com with SMTP id 23so5243386pfj.1 for ; Fri, 13 Mar 2020 06:23:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Xh3IQJ4W2tv1AeOqB3mfwwe3SxLMtV7SfxuArlzBnaU=; b=KcGx3Vt7HFKynkYgIZgNWzJmpiGNb5AsI1nznu5y0KpdflNjMtl3Sj5WTORK8Cr0Kb jGR2koQe2TarO+HZ/Fsk4kPY5TVVzej6pdG6jmUbjkP+MQHyGB7XjN3cy3AP2vY5ByA8 82vvOFqnofUpZof0p+sGAuIQHaN9rfBUtbB/vb+XrkRPxV9akesAn/AWZpOojMFHwF9G sqjza2sd9ElRKFAXbZITUenO7KVAkpFNCkaMriVhep369Wj9wFFe9nAzoW6BXkpYMudn 4qVZVgbLdv5LhDFj1kP12eJiMw9q4GMzqib6UxAtLzH4bhqAU0ysypS9/OGu4lC3YKYm fdUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Xh3IQJ4W2tv1AeOqB3mfwwe3SxLMtV7SfxuArlzBnaU=; b=ZWUwCwFySp9xd3iBYqPIANyj9T7ugwIEhjeY5DIn/2ZUNFK9wCEfn/+wz0P1IoWr7d sxhAdDxG7UOeujLUOrkfYMX/ywL6wMpBAUSOpjomw4+kQwNtVhyJ1IbwCIGkuYYLoa+b 95U/rNciqMXj/4evHRr+2vXovW6iQrAtEmEMdCASOfvP/h015LqtRe6cmPvHnfgkS3jR PLeF1kIJ+0DcdgXkdAZ/MY/LUzQz2VnBfs6iN2VW6iC8t3ugj8hn3q+2t+dzbtvKtoNj DksTNei6XsgpPemyghNAW7mBqoPnMq/fa6cg1EoW7+3lM9w0l0O9aA/vuCym/MrQuu8x cPMA== X-Gm-Message-State: ANhLgQ1ckToMXV95PUl2wtJjZyk2Uxcp1XdOurFZluOunDksvHe2I8kB tdHh+TmowxOV6icKp+seGGjCSooP X-Google-Smtp-Source: ADFU+vtMwQPHkg3ezBHLtN58qmkQetXgxDDMlT3DGV15ZcMAISEwQYb9OEN/ffgfkGHwkn4Py4Eysg== X-Received: by 2002:a62:ed0b:: with SMTP id u11mr13821117pfh.46.1584105793477; Fri, 13 Mar 2020 06:23:13 -0700 (PDT) Received: from nj08008nbu.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id y9sm21490296pgo.80.2020.03.13.06.23.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 13 Mar 2020 06:23:13 -0700 (PDT) From: Kevin Tang To: maarten.lankhorst@linux.intel.com, mripard@kernel.org, sean@poorly.run, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, mark.rutland@arm.com, kevin3.tang@gmail.com Cc: orsonzhai@gmail.com, baolin.wang@linaro.org, zhang.lyra@gmail.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [PATCH RFC v5 5/6] dt-bindings: display: add Unisoc's mipi dsi&dphy bindings Date: Fri, 13 Mar 2020 21:22:46 +0800 Message-Id: <1584105767-11963-6-git-send-email-kevin3.tang@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1584105767-11963-1-git-send-email-kevin3.tang@gmail.com> References: <1584105767-11963-1-git-send-email-kevin3.tang@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kevin Tang Adds MIPI DSI Master and MIPI DSI-PHY (D-PHY) support for Unisoc's display subsystem. Cc: Orson Zhai Cc: Baolin Wang Cc: Chunyan Zhang Signed-off-by: Kevin Tang --- .../devicetree/bindings/display/sprd/dphy.yaml | 75 +++++++++++++++++ .../devicetree/bindings/display/sprd/dsi.yaml | 98 ++++++++++++++++++++++ 2 files changed, 173 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/sprd/dphy.yaml create mode 100644 Documentation/devicetree/bindings/display/sprd/dsi.yaml diff --git a/Documentation/devicetree/bindings/display/sprd/dphy.yaml b/Documentation/devicetree/bindings/display/sprd/dphy.yaml new file mode 100644 index 0000000..1b83260 --- /dev/null +++ b/Documentation/devicetree/bindings/display/sprd/dphy.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/sprd/dphy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Unisoc MIPI DSI-PHY (D-PHY) + +maintainers: + - Mark Rutland + +properties: + compatible: + const: sprd,sharkl3-dsi-phy + + reg: + maxItems: 1 + description: + Must be the dsi controller base address. + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + port@0: + type: object + description: + A port node with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. + That port should be the output endpoint, usually output to + the associated panel. + port@1: + type: object + description: + A port node with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. + That port should be the input endpoint, usually coming from + the associated DSI controller. + +required: + - compatible + - reg + - port@0 + - port@1 + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + dphy: dphy { + compatible = "sprd,sharkl3-dsi-phy"; + reg = <0x0 0x63100000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + + /* input port*/ + port@1 { + reg = <1>; + dphy_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + + /* output port */ + port@0 { + reg = <0>; + dphy_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/display/sprd/dsi.yaml b/Documentation/devicetree/bindings/display/sprd/dsi.yaml new file mode 100644 index 0000000..d89d957 --- /dev/null +++ b/Documentation/devicetree/bindings/display/sprd/dsi.yaml @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/sprd/dsi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Unisoc MIPI DSI Master + +maintainers: + - Mark Rutland + +properties: + compatible: + const: sprd,sharkl3-dsi-host + + reg: + maxItems: 1 + description: + Physical base address and length of the registers set for the device. + + interrupts: + maxItems: 2 + description: + Should contain DSI interrupt. + + clocks: + minItems: 1 + + clock-names: + items: + - const: clk_src_96m + + power-domains: + maxItems: 1 + description: A phandle to DSIM power domain node + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + port@0: + type: object + description: + A port node with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. + That port should be the input endpoint, usually coming from + the associated DPU. + port@1: + type: object + description: + A port node with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. + That port should be the output endpoint, usually output to + the associated DPHY. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - port@0 + - port@1 + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + #include + #include + dsi: dsi@0x63100000 { + compatible = "sprd,sharkl3-dsi-host"; + reg = <0 0x63100000 0 0x1000>; + interrupts = , + ; + clock-names = "clk_src_96m"; + clocks = <&pll CLK_TWPLL_96M>; + + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + dsi_in: endpoint { + remote-endpoint = <&dpu_out>; + }; + }; + + port@1 { + reg = <1>; + dsi_out: endpoint@1 { + remote-endpoint = <&dphy_in>; + }; + }; + }; -- 2.7.4