From: Jolly Shah <jolly.shah@xilinx.com>
To: ard.biesheuvel@linaro.org, mingo@kernel.org,
gregkh@linuxfoundation.org, matt@codeblueprint.co.uk,
sudeep.holla@arm.com, hkallweit1@gmail.com,
keescook@chromium.org, dmitry.torokhov@gmail.com,
michal.simek@xilinx.com
Cc: rajanv@xilinx.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Rajan Vaja <rajan.vaja@xilinx.com>,
Jolly Shah <jolly.shah@xilinx.com>
Subject: [PATCH v5 03/25] firmware: xilinx: Remove eemi ops for query_data
Date: Fri, 24 Apr 2020 13:57:45 -0700 [thread overview]
Message-ID: <1587761887-4279-4-git-send-email-jolly.shah@xilinx.com> (raw)
In-Reply-To: <1587761887-4279-1-git-send-email-jolly.shah@xilinx.com>
From: Rajan Vaja <rajan.vaja@xilinx.com>
Use direct function call for query_data instead of using eemi ops.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
---
drivers/clk/zynqmp/clkc.c | 17 ++++++-----------
drivers/clk/zynqmp/divider.c | 3 +--
drivers/firmware/xilinx/zynqmp-debug.c | 3 +--
drivers/firmware/xilinx/zynqmp.c | 4 ++--
include/linux/firmware/xlnx-zynqmp.h | 7 ++++++-
5 files changed, 16 insertions(+), 18 deletions(-)
diff --git a/drivers/clk/zynqmp/clkc.c b/drivers/clk/zynqmp/clkc.c
index 10e89f2..5eed5ce 100644
--- a/drivers/clk/zynqmp/clkc.c
+++ b/drivers/clk/zynqmp/clkc.c
@@ -134,7 +134,6 @@ static struct clk_hw *(* const clk_topology[]) (const char *name, u32 clk_id,
static struct zynqmp_clock *clock;
static struct clk_hw_onecell_data *zynqmp_data;
static unsigned int clock_max_idx;
-static const struct zynqmp_eemi_ops *eemi_ops;
/**
* zynqmp_is_valid_clock() - Check whether clock is valid or not
@@ -206,7 +205,7 @@ static int zynqmp_pm_clock_get_num_clocks(u32 *nclocks)
qdata.qid = PM_QID_CLOCK_GET_NUM_CLOCKS;
- ret = eemi_ops->query_data(qdata, ret_payload);
+ ret = zynqmp_pm_query_data(qdata, ret_payload);
*nclocks = ret_payload[1];
return ret;
@@ -231,7 +230,7 @@ static int zynqmp_pm_clock_get_name(u32 clock_id,
qdata.qid = PM_QID_CLOCK_GET_NAME;
qdata.arg1 = clock_id;
- eemi_ops->query_data(qdata, ret_payload);
+ zynqmp_pm_query_data(qdata, ret_payload);
memcpy(response, ret_payload, sizeof(*response));
return 0;
@@ -265,7 +264,7 @@ static int zynqmp_pm_clock_get_topology(u32 clock_id, u32 index,
qdata.arg1 = clock_id;
qdata.arg2 = index;
- ret = eemi_ops->query_data(qdata, ret_payload);
+ ret = zynqmp_pm_query_data(qdata, ret_payload);
memcpy(response, &ret_payload[1], sizeof(*response));
return ret;
@@ -296,7 +295,7 @@ struct clk_hw *zynqmp_clk_register_fixed_factor(const char *name, u32 clk_id,
qdata.qid = PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS;
qdata.arg1 = clk_id;
- ret = eemi_ops->query_data(qdata, ret_payload);
+ ret = zynqmp_pm_query_data(qdata, ret_payload);
if (ret)
return ERR_PTR(ret);
@@ -339,7 +338,7 @@ static int zynqmp_pm_clock_get_parents(u32 clock_id, u32 index,
qdata.arg1 = clock_id;
qdata.arg2 = index;
- ret = eemi_ops->query_data(qdata, ret_payload);
+ ret = zynqmp_pm_query_data(qdata, ret_payload);
memcpy(response, &ret_payload[1], sizeof(*response));
return ret;
@@ -364,7 +363,7 @@ static int zynqmp_pm_clock_get_attributes(u32 clock_id,
qdata.qid = PM_QID_CLOCK_GET_ATTRIBUTES;
qdata.arg1 = clock_id;
- ret = eemi_ops->query_data(qdata, ret_payload);
+ ret = zynqmp_pm_query_data(qdata, ret_payload);
memcpy(response, &ret_payload[1], sizeof(*response));
return ret;
@@ -738,10 +737,6 @@ static int zynqmp_clock_probe(struct platform_device *pdev)
int ret;
struct device *dev = &pdev->dev;
- eemi_ops = zynqmp_pm_get_eemi_ops();
- if (IS_ERR(eemi_ops))
- return PTR_ERR(eemi_ops);
-
ret = zynqmp_clk_setup(dev->of_node);
return ret;
diff --git a/drivers/clk/zynqmp/divider.c b/drivers/clk/zynqmp/divider.c
index 4be2cc7..e21f4ea 100644
--- a/drivers/clk/zynqmp/divider.c
+++ b/drivers/clk/zynqmp/divider.c
@@ -258,7 +258,6 @@ static const struct clk_ops zynqmp_clk_divider_ops = {
*/
u32 zynqmp_clk_get_max_divisor(u32 clk_id, u32 type)
{
- const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops();
struct zynqmp_pm_query_data qdata = {0};
u32 ret_payload[PAYLOAD_ARG_CNT];
int ret;
@@ -266,7 +265,7 @@ u32 zynqmp_clk_get_max_divisor(u32 clk_id, u32 type)
qdata.qid = PM_QID_CLOCK_GET_MAX_DIVISOR;
qdata.arg1 = clk_id;
qdata.arg2 = type;
- ret = eemi_ops->query_data(qdata, ret_payload);
+ ret = zynqmp_pm_query_data(qdata, ret_payload);
/*
* To maintain backward compatibility return maximum possible value
* (0xFFFF) if query for max divisor is not successful.
diff --git a/drivers/firmware/xilinx/zynqmp-debug.c b/drivers/firmware/xilinx/zynqmp-debug.c
index 06a21ef..99606b3 100644
--- a/drivers/firmware/xilinx/zynqmp-debug.c
+++ b/drivers/firmware/xilinx/zynqmp-debug.c
@@ -85,7 +85,6 @@ static int get_pm_api_id(char *pm_api_req, u32 *pm_id)
static int process_api_request(u32 pm_id, u64 *pm_api_arg, u32 *pm_api_ret)
{
- const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops();
u32 pm_api_version;
int ret;
struct zynqmp_pm_query_data qdata = {0};
@@ -102,7 +101,7 @@ static int process_api_request(u32 pm_id, u64 *pm_api_arg, u32 *pm_api_ret)
qdata.arg2 = pm_api_arg[2];
qdata.arg3 = pm_api_arg[3];
- ret = eemi_ops->query_data(qdata, pm_api_ret);
+ ret = zynqmp_pm_query_data(qdata, pm_api_ret);
if (ret)
break;
diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index 36ab9ac..3fbab29 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -326,7 +326,7 @@ static int get_set_conduit_method(struct device_node *np)
*
* Return: Returns status, either success or error+reason
*/
-static int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out)
+int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out)
{
int ret;
@@ -340,6 +340,7 @@ static int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out)
*/
return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret;
}
+EXPORT_SYMBOL_GPL(zynqmp_pm_query_data);
/**
* zynqmp_pm_clock_enable() - Enable the clock for given id
@@ -736,7 +737,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out)
}
static const struct zynqmp_eemi_ops eemi_ops = {
- .query_data = zynqmp_pm_query_data,
.clock_enable = zynqmp_pm_clock_enable,
.clock_disable = zynqmp_pm_clock_disable,
.clock_getstate = zynqmp_pm_clock_getstate,
diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index 89f6a53..fa1195c7 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -296,7 +296,6 @@ struct zynqmp_pm_query_data {
struct zynqmp_eemi_ops {
int (*fpga_load)(const u64 address, const u32 size, const u32 flags);
int (*fpga_get_status)(u32 *value);
- int (*query_data)(struct zynqmp_pm_query_data qdata, u32 *out);
int (*clock_enable)(u32 clock_id);
int (*clock_disable)(u32 clock_id);
int (*clock_getstate)(u32 clock_id, u32 *state);
@@ -331,6 +330,7 @@ int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
const struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void);
int zynqmp_pm_get_api_version(u32 *version);
int zynqmp_pm_get_chipid(u32 *idcode, u32 *version);
+int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out);
#else
static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void)
{
@@ -344,6 +344,11 @@ static inline int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
{
return -ENODEV;
}
+static inline int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata,
+ u32 *out)
+{
+ return -ENODEV;
+}
#endif
#endif /* __FIRMWARE_ZYNQMP_H__ */
--
2.7.4
next prev parent reply other threads:[~2020-04-24 20:59 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-24 20:57 [PATCH v5 00/25] firmware: xilinx: Add xilinx specific sysfs interface Jolly Shah
2020-04-24 20:57 ` [PATCH v5 01/25] firmware: xilinx: Remove eemi ops for get_api_version Jolly Shah
2020-04-24 20:57 ` [PATCH v5 02/25] firmware: xilinx: Remove eemi ops for get_chipid Jolly Shah
2020-04-24 20:57 ` Jolly Shah [this message]
2020-04-24 20:57 ` [PATCH v5 04/25] firmware: xilinx: Remove eemi ops for clock_enable Jolly Shah
2020-04-24 20:57 ` [PATCH v5 05/25] firmware: xilinx: Remove eemi ops for clock_disable Jolly Shah
2020-04-24 20:57 ` [PATCH v5 06/25] firmware: xilinx: Remove eemi ops for clock_getstate Jolly Shah
2020-04-24 20:57 ` [PATCH v5 07/25] firmware: xilinx: Remove eemi ops for clock_setdivider Jolly Shah
2020-04-24 20:57 ` [PATCH v5 08/25] firmware: xilinx: Remove eemi ops for clock_getdivider Jolly Shah
2020-04-24 20:57 ` [PATCH v5 09/25] firmware: xilinx: Remove eemi ops for clock set/get rate Jolly Shah
2020-04-24 20:57 ` [PATCH v5 10/25] firmware: xilinx: Remove eemi ops for clock set/get parent Jolly Shah
2020-04-24 20:57 ` [PATCH v5 11/25] firmware: xilinx: Use APIs instead of IOCTLs Jolly Shah
2020-04-24 20:57 ` [PATCH v5 12/25] firmware: xilinx: Remove eemi ops for reset_assert Jolly Shah
2020-04-24 20:57 ` [PATCH v5 13/25] firmware: xilinx: Remove eemi ops for reset_get_status Jolly Shah
2020-04-24 20:57 ` [PATCH v5 14/25] firmware: xilinx: Remove eemi ops for init_finalize Jolly Shah
2020-04-24 20:57 ` [PATCH v5 15/25] firmware: xilinx: Remove eemi ops for set_suspend_mode Jolly Shah
2020-04-24 20:57 ` [PATCH v5 16/25] firmware: xilinx: Remove eemi ops for request_node Jolly Shah
2020-04-24 20:57 ` [PATCH v5 17/25] firmware: xilinx: Remove eemi ops for release_node Jolly Shah
2020-04-24 20:58 ` [PATCH v5 18/25] firmware: xilinx: Remove eemi ops for set_requirement Jolly Shah
2020-04-24 20:58 ` [PATCH v5 19/25] firmware: xilinx: Remove eemi ops for aes engine Jolly Shah
2020-04-24 20:58 ` [PATCH v5 20/25] firmware: xilinx: Remove eemi ops for fpga related APIs Jolly Shah
2020-04-24 20:58 ` [PATCH v5 21/25] firmware: xilinx: Add APIs to read/write GGS/PGGS registers Jolly Shah
2020-04-24 20:58 ` [PATCH v5 22/25] firmware: xilinx: Add sysfs interface Jolly Shah
2020-04-24 20:58 ` [PATCH v5 23/25] firmware: xilinx: Add system shutdown API interface Jolly Shah
2020-04-24 20:58 ` [PATCH v5 24/25] firmware: xilinx: Add sysfs to set shutdown scope Jolly Shah
2020-04-24 20:58 ` [PATCH v5 25/25] firmware: xilinx: Add sysfs and API to set boot health status Jolly Shah
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