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Thu, 30 Apr 2020 09:59:21 +0000 From: Sagar Shrikant Kadam To: tudor.ambarus@microchip.com, miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Sagar Shrikant Kadam Subject: [PATCH 2/2] spi: nor: update page program settings for is25wp256 using post bfpt fixup Date: Thu, 30 Apr 2020 02:58:52 -0700 Message-Id: <1588240732-13905-3-git-send-email-sagar.kadam@sifive.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1588240732-13905-1-git-send-email-sagar.kadam@sifive.com> References: <1588240732-13905-1-git-send-email-sagar.kadam@sifive.com> Content-Type: text/plain X-ClientProxiedBy: BYAPR08CA0027.namprd08.prod.outlook.com (2603:10b6:a03:100::40) To BN8PR13MB2611.namprd13.prod.outlook.com (2603:10b6:408:81::17) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from gamma07.internal.sifive.com (64.62.193.194) by BYAPR08CA0027.namprd08.prod.outlook.com (2603:10b6:a03:100::40) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.2958.20 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: MgeCjNPMxNVPp4vjAQfJe9uK8TtX0KSHJJxcI21dPrkFcpp+IJEL+Hj3YVkfvQAF3CxEzL/Hpj/HoEmKBN/legrGQRAM1Z2ob087UjkREhAEbEypt/AxD0a/a8FyItIeSYB9FRko4YWd7EZ8ZAgxzZ7wgLWyU3tw0xxQMN6cMW8a03VdVyc97Pi4qMU3rzr7e9NYr4EoSG5YtfWG8Our+D1uBlLNNC/liFcJ0cOeKwrjarsls0F3pq3wMMOEhr36CSy+P0s+y6PdMLkjVhe4d5t+4RWDSZji1Ad5I7QSgC1BYkngGtnTD1SuIf5Twn4CQXq4TYIiUww/stgebXFr+x7+yOSmxgLQ4d8QUFxdUxP/mU+LuK7WLaqy/M0F6COqPqvxsCj7zSwyfaaUhAiuYvjwqrETKeJFIhhlrfa9P3yoSCZyrdofYByeQoz+VDWbsIyeKw/d1BzA/0k0zkXGtP3F3aAOHbp+HUBqtU2de+YWeGroiYodDdf1hACxO3Wj/baTwAT/nJSx1m3MuwFvhYzA6A7/oT4Vq8R2uduQzM/9NZwYXXiQeWReOLjYOJMTdgXj48JAMcncwtzkWP5zjp4zDutwSOlQA1OWQ3KrTIMCnsypuw0uF/V17brKIiAIeW3GS1ygAEUzOnqFGokOyaUHrSZoRF0rhmzwL25cGrQVOfKGk8Tv3eRoaFar1LduZLaC6lLDYcdQHtiadtGvJi49FE70vOTGUygaGzmM8ieCNJPCOwgriBqVAiD4WESNvirmFMbiPGRhljV/WCbXuk/2NBWZPQlT289O8mDz3I8= X-OriginatorOrg: sifive.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7cfacc88-ae92-4046-6b0e-08d7eced2782 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Apr 2020 09:59:21.7013 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 22f88e9d-ae0d-4ed9-b984-cdc9be1529f1 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: HqTe1ObbgXWmuwEDM4quTXlvnhomtKTFVF23Zx1vdN1Mc6mllkoE5DlwpPo4j8WgjevLOE74VF2uoR/XuiUp4g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR13MB2884 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org During SFDP parsing it is seen that the IS25WP256d device is missing 4BAIT (4-Byte address instruction table), due to which it's page program capacity doesn't get correctly populated and the device gets configured with 4-byte Address Serial Input Page Program i.e. SNOR_PROTO_1_1_1 even though it can work with SNOR_PROTO_1_1_4. Here using the post bfpt fixup hooks we update the page program settings to 4-byte QUAD Input Page program operations. The patch is tested on HiFive Unleashed A00 board and it benefits few seconds of average write time for entire flash write. QUAD Input Page Program operations: > time mtd_debug write /dev/mtd0 0 33554432 rd32M Copied 33554432 bytes from rd32M to address 0x00000000 in flash real 0m 32.85s user 0m 0.00s sys 0m 31.79s Serial Input Page Program operations: > time mtd_debug write /dev/mtd0 0 33554432 rd32M Copied 33554432 bytes from rd32M to address 0x00000000 in flash real 0m 35.87s user 0m 0.00s sys 0m 35.42s Signed-off-by: Sagar Shrikant Kadam --- drivers/mtd/spi-nor/issi.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c index ffcb60e..9eb6e82 100644 --- a/drivers/mtd/spi-nor/issi.c +++ b/drivers/mtd/spi-nor/issi.c @@ -23,6 +23,22 @@ is25lp256_post_bfpt_fixups(struct spi_nor *nor, BFPT_DWORD1_ADDRESS_BYTES_3_ONLY) nor->addr_width = 4; + /* + * On IS25WP256d device 4-Byte address instruction table doesn't + * get populated and so the device get's configured with 4-byte + * Address Serial Input Page Program i.e. SNOR_PROTO_1_1_1 even + * though it supports SNOR_PROTO_1_1_4, so priorotize QUAD write + * over SINGLE write if device id table holds SPI_NOR_QUAD_READ. + */ + if (strcmp(nor->info->name, "is25wp256") == 0) { + if (nor->info->flags & SPI_NOR_QUAD_READ) { + params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_4; + spi_nor_set_pp_settings + (¶ms->page_programs[SNOR_CMD_PP_1_1_4], + SPINOR_OP_PP_1_1_4, + SNOR_PROTO_1_1_4); + } + } return 0; } -- 2.7.4