From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75314C47254 for ; Thu, 30 Apr 2020 23:47:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5C611208DB for ; Thu, 30 Apr 2020 23:47:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727863AbgD3Xrz (ORCPT ); Thu, 30 Apr 2020 19:47:55 -0400 Received: from mga04.intel.com ([192.55.52.120]:50626 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726435AbgD3Xry (ORCPT ); Thu, 30 Apr 2020 19:47:54 -0400 IronPort-SDR: 7CcFVLXO5bagEdsyV4vlJPBDSQPuiINPOhjOe58HmBlwMbHT2Xh+1TmPYlKvpQiFcKIxpF3ij5 uLlT2m3VFyTw== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2020 16:47:54 -0700 IronPort-SDR: 4R95yIHuuoelQPfPAyj7AmyEkHzBeDVwTy3znYUpIte4iFc0huwpYGoVoUypaB3XRtpVGWi9AY s3VYA56KWLaA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,337,1583222400"; d="scan'208";a="258473443" Received: from romley-ivt3.sc.intel.com ([172.25.110.60]) by orsmga003.jf.intel.com with ESMTP; 30 Apr 2020 16:47:53 -0700 From: Fenghua Yu To: "Thomas Gleixner" , "Peter Zijlstra" , "Borislav Petkov" , "Ingo Molnar" , "Tony Luck" Cc: "x86" , "linux-kernel" , Fenghua Yu Subject: [PATCH] x86/split_lock: Add Icelake microserver CPU model Date: Thu, 30 Apr 2020 16:46:35 -0700 Message-Id: <1588290395-2677-1-git-send-email-fenghua.yu@intel.com> X-Mailer: git-send-email 2.5.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Icelake microserver CPU supports split lock detection while it doesn't have the split lock enumeration bit in IA32_CORE_CAPABILITIES. Enumerate the feature by model number. Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck --- arch/x86/kernel/cpu/intel.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index a19a680542ce..b59bc4ab2425 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -1135,6 +1135,7 @@ void switch_to_sld(unsigned long tifn) static const struct x86_cpu_id split_lock_cpu_ids[] __initconst = { X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, 0), X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, 0), + X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, 0), X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, 1), X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, 1), X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, 1), -- 2.19.1