From: John Garry <john.garry@huawei.com>
To: <peterz@infradead.org>, <mingo@redhat.com>, <acme@kernel.org>,
<mark.rutland@arm.com>, <alexander.shishkin@linux.intel.com>,
<jolsa@redhat.com>, <namhyung@kernel.org>
Cc: <will@kernel.org>, <ak@linux.intel.com>, <linuxarm@huawei.com>,
<linux-kernel@vger.kernel.org>, <qiangqing.zhang@nxp.com>,
<irogers@google.com>, <robin.murphy@arm.com>,
<zhangshaokun@hisilicon.com>,
<linux-arm-kernel@lists.infradead.org>,
John Garry <john.garry@huawei.com>
Subject: [PATCH RFC v3 04/12] perf vendor events arm64: Add Architected events smmuv3-pmcg.json
Date: Thu, 7 May 2020 19:57:43 +0800 [thread overview]
Message-ID: <1588852671-61996-5-git-send-email-john.garry@huawei.com> (raw)
In-Reply-To: <1588852671-61996-1-git-send-email-john.garry@huawei.com>
Add JSON for Architected events from [0], Section 10.3 .
[0] https://static.docs.arm.com/ihi0070/a/IHI_0070A_SMMUv3.pdf
Signed-off-by: John Garry <john.garry@huawei.com>
---
tools/perf/pmu-events/arch/arm64/smmuv3-pmcg.json | 58 +++++++++++++++++++++++
tools/perf/pmu-events/jevents.c | 2 +
2 files changed, 60 insertions(+)
create mode 100644 tools/perf/pmu-events/arch/arm64/smmuv3-pmcg.json
diff --git a/tools/perf/pmu-events/arch/arm64/smmuv3-pmcg.json b/tools/perf/pmu-events/arch/arm64/smmuv3-pmcg.json
new file mode 100644
index 000000000000..8a59ce48bf06
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/smmuv3-pmcg.json
@@ -0,0 +1,58 @@
+[
+ {
+ "PublicDescription": "Clock cycles",
+ "EventCode": "0x00",
+ "EventName": "smmuv3_pmcg.CYCLES",
+ "BriefDescription": "Clock cycles"
+ "Unit": "smmuv3_pmcg",
+ },
+ {
+ "PublicDescription": "Transaction",
+ "EventCode": "0x01",
+ "EventName": "smmuv3_pmcg.TRANSACTION",
+ "BriefDescription": "Transaction"
+ "Unit": "smmuv3_pmcg",
+ },
+ {
+ "PublicDescription": "TLB miss caused by incoming transaction or (ATS or non-ATS) translation request",
+ "EventCode": "0x02",
+ "EventName": "smmuv3_pmcg.TLB_MISS",
+ "BriefDescription": "TLB miss caused by incoming transaction or (ATS or non-ATS) translation request"
+ "Unit": "smmuv3_pmcg",
+ },
+ {
+ "PublicDescription": "Configuration cache miss caused by transaction or(ATS or non-ATS)translation request",
+ "EventCode": "0x03",
+ "EventName": "smmuv3_pmcg.CONFIG_CACHE_MISS",
+ "BriefDescription": "Configuration cache miss caused by transaction or(ATS or non-ATS)translation request"
+ "Unit": "smmuv3_pmcg",
+ },
+ {
+ "PublicDescription": "Translation table walk access",
+ "EventCode": "0x04",
+ "EventName": "smmuv3_pmcg.TRANS_TABLE_WALK_ACCESS",
+ "BriefDescription": "Translation table walk access"
+ "Unit": "smmuv3_pmcg",
+ },
+ {
+ "PublicDescription": "Configuration structure access",
+ "EventCode": "0x05",
+ "EventName": "smmuv3_pmcg.CONFIG_STRUCT_ACCESS",
+ "BriefDescription": "Configuration structure access"
+ "Unit": "smmuv3_pmcg",
+ },
+ {
+ "PublicDescription": "PCIe ATS Translation Request received",
+ "EventCode": "0x06",
+ "EventName": "smmuv3_pmcg.PCIE_ATS_TRANS_RQ",
+ "BriefDescription": "PCIe ATS Translation Request received"
+ "Unit": "smmuv3_pmcg",
+ },
+ {
+ "PublicDescription": "PCIe ATS Translated Transaction passed through SMMU",
+ "EventCode": "0x07",
+ "EventName": "smmuv3_pmcg.PCIE_ATS_TRANS_PASSED",
+ "BriefDescription": "PCIe ATS Translated Transaction passed through SMMU"
+ "Unit": "smmuv3_pmcg",
+ }
+]
diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c
index acb6b77bddc0..76a84ec2ffc8 100644
--- a/tools/perf/pmu-events/jevents.c
+++ b/tools/perf/pmu-events/jevents.c
@@ -256,6 +256,8 @@ static struct map {
{ "hisi_sccl,ddrc", "hisi_sccl,ddrc" },
{ "hisi_sccl,hha", "hisi_sccl,hha" },
{ "hisi_sccl,l3c", "hisi_sccl,l3c" },
+ /* it's not realistic to keep adding these, we need something more scalable ... */
+ { "smmuv3_pmcg", "smmuv3_pmcg" },
{ "L3PMC", "amd_l3" },
{}
};
--
2.16.4
next prev parent reply other threads:[~2020-05-07 12:02 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-07 11:57 [PATCH RFC v3 00/12] perf pmu-events: Support event aliasing for system PMUs John Garry
2020-05-07 11:57 ` [PATCH RFC v3 01/12] perf jevents: Add support for an extra directory level John Garry
2020-05-07 11:57 ` [PATCH RFC v3 02/12] perf jevents: Add support for system events tables John Garry
2020-05-11 11:01 ` Jiri Olsa
2020-05-11 14:52 ` John Garry
2020-05-11 11:01 ` Jiri Olsa
2020-05-11 15:02 ` John Garry
2020-05-11 16:21 ` Ian Rogers
2020-05-12 10:29 ` Jiri Olsa
2020-05-11 11:01 ` Jiri Olsa
2020-05-07 11:57 ` [PATCH RFC v3 03/12] perf vendor events arm64: Relocate hip08 events John Garry
2020-05-07 11:57 ` John Garry [this message]
2020-05-07 11:57 ` [PATCH RFC v3 05/12] perf vendor events arm64: Add hip08 SMMUv3 PMCG events John Garry
2020-05-07 11:57 ` [PATCH RFC v3 06/12] perf pmu: Add pmu_id() John Garry
2020-05-07 11:57 ` [PATCH RFC v3 07/12] perf pmu: Add pmu_add_sys_aliases() John Garry
2020-05-07 11:57 ` [PATCH RFC v3 08/12] perf vendor events: Add JSON metrics for imx8mm DDR Perf John Garry
2020-05-07 11:57 ` [PATCH RFC v3 09/12] perf metricgroup: Split up metricgroup__add_metric() John Garry
2020-05-11 11:01 ` Jiri Olsa
2020-05-11 11:25 ` John Garry
2020-05-11 11:35 ` Joakim Zhang
2020-05-07 11:57 ` [PATCH RFC v3 10/12] perf metricgroup: Split up metricgroup__print() John Garry
2020-05-07 11:57 ` [PATCH RFC v3 11/12] perf metricgroup: Support printing metric groups for system PMUs John Garry
2020-05-07 11:57 ` [PATCH RFC v3 12/12] perf metricgroup: Support adding metrics " John Garry
2020-05-08 2:55 ` [PATCH RFC v3 00/12] perf pmu-events: Support event aliasing " Joakim Zhang
2020-05-12 8:02 ` Joakim Zhang
2020-05-12 10:13 ` John Garry
2020-05-12 10:30 ` Joakim Zhang
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