From: "tip-bot2 for Lai Jiangshan" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Lai Jiangshan <laijs@linux.alibaba.com>,
"Peter Zijlstra (Intel)" <peterz@infradead.org>,
Thomas Gleixner <tglx@linutronix.de>, x86 <x86@kernel.org>,
LKML <linux-kernel@vger.kernel.org>
Subject: [tip: x86/entry] x86/hw_breakpoint: Prevent data breakpoints on user_pcid_flush_mask
Date: Sat, 30 May 2020 09:57:21 -0000 [thread overview]
Message-ID: <159083264193.17951.13800361200842101495.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20200526014221.2119-5-laijs@linux.alibaba.com>
The following commit has been merged into the x86/entry branch of tip:
Commit-ID: 87aa9b64e0ccb779db3970e2e9af1cc5930c2c3d
Gitweb: https://git.kernel.org/tip/87aa9b64e0ccb779db3970e2e9af1cc5930c2c3d
Author: Lai Jiangshan <laijs@linux.alibaba.com>
AuthorDate: Fri, 29 May 2020 23:27:32 +02:00
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Sat, 30 May 2020 10:00:06 +02:00
x86/hw_breakpoint: Prevent data breakpoints on user_pcid_flush_mask
The per-CPU user_pcid_flush_mask is used in the low level entry code. A
data breakpoint can cause #DB recursion.
Protect the full cpu_tlbstate structure for simplicity.
Signed-off-by: Lai Jiangshan <laijs@linux.alibaba.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/20200526014221.2119-5-laijs@linux.alibaba.com
Link: https://lkml.kernel.org/r/20200529213320.955117574@infradead.org
---
arch/x86/kernel/hw_breakpoint.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/x86/kernel/hw_breakpoint.c b/arch/x86/kernel/hw_breakpoint.c
index f311bbf..fc1743a 100644
--- a/arch/x86/kernel/hw_breakpoint.c
+++ b/arch/x86/kernel/hw_breakpoint.c
@@ -33,6 +33,7 @@
#include <asm/debugreg.h>
#include <asm/user.h>
#include <asm/desc.h>
+#include <asm/tlbflush.h>
/* Per cpu debug control register value */
DEFINE_PER_CPU(unsigned long, cpu_dr7);
@@ -264,6 +265,16 @@ static inline bool within_cpu_entry(unsigned long addr, unsigned long end)
(unsigned long)&per_cpu(cpu_tss_rw, cpu),
sizeof(struct tss_struct)))
return true;
+
+ /*
+ * cpu_tlbstate.user_pcid_flush_mask is used for CPU entry.
+ * If a data breakpoint on it, it will cause an unwanted #DB.
+ * Protect the full cpu_tlbstate structure to be sure.
+ */
+ if (within_area(addr, end,
+ (unsigned long)&per_cpu(cpu_tlbstate, cpu),
+ sizeof(struct tlb_state)))
+ return true;
}
return false;
next prev parent reply other threads:[~2020-05-30 9:57 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-25 14:50 [RFC PATCH 0/5] x86/hw_breakpoint: protects more cpu entry data Lai Jiangshan
2020-05-25 14:50 ` [RFC PATCH 1/5] x86/hw_breakpoint: add within_area() to check data breakpoints Lai Jiangshan
2020-05-25 14:50 ` [RFC PATCH 2/5] x86/hw_breakpoint: Prevent data breakpoints on direct GDT Lai Jiangshan
2020-05-25 14:51 ` [RFC PATCH 3/5] x86/hw_breakpoint: Prevent data breakpoints on per_cpu cpu_tss_rw Lai Jiangshan
2020-05-25 14:51 ` [RFC PATCH 4/5] x86/hw_breakpoint: Prevent data breakpoints on user_pcid_flush_mask Lai Jiangshan
2020-05-25 14:51 ` [RFC PATCH 5/5] x86/hw_breakpoint: Prevent data breakpoints on debug_idt_table Lai Jiangshan
2020-05-25 15:25 ` [RFC PATCH 0/5] x86/hw_breakpoint: protects more cpu entry data Peter Zijlstra
2020-05-26 1:42 ` [RFC PATCH V2 0/7] x86/DB: protects more cpu entry data and Lai Jiangshan
2020-05-26 1:42 ` [RFC PATCH V2 1/7] x86/hw_breakpoint: add within_area() to check data breakpoints Lai Jiangshan
2020-05-30 9:57 ` [tip: x86/entry] x86/hw_breakpoint: Add " tip-bot2 for Lai Jiangshan
2020-05-26 1:42 ` [RFC PATCH V2 2/7] x86/hw_breakpoint: Prevent data breakpoints on direct GDT Lai Jiangshan
2020-05-30 9:57 ` [tip: x86/entry] " tip-bot2 for Lai Jiangshan
2020-05-26 1:42 ` [RFC PATCH V2 3/7] x86/hw_breakpoint: Prevent data breakpoints on per_cpu cpu_tss_rw Lai Jiangshan
2020-05-30 9:57 ` [tip: x86/entry] " tip-bot2 for Lai Jiangshan
2020-05-26 1:42 ` [RFC PATCH V2 4/7] x86/hw_breakpoint: Prevent data breakpoints on user_pcid_flush_mask Lai Jiangshan
2020-05-26 4:17 ` Andy Lutomirski
2020-05-26 4:31 ` Lai Jiangshan
2020-05-26 4:38 ` Andy Lutomirski
2020-05-26 5:48 ` Lai Jiangshan
2020-05-30 9:57 ` tip-bot2 for Lai Jiangshan [this message]
2020-05-26 1:42 ` [RFC PATCH V2 5/7] x86/entry: don't shift stack on #DB Lai Jiangshan
2020-05-26 9:10 ` Peter Zijlstra
2020-05-26 1:42 ` [RFC PATCH V2 6/7] x86/entry: is_debug_stack() don't check of DB1 stack Lai Jiangshan
2020-05-26 1:42 ` [RFC PATCH V2 7/7] x86/entry: remove DB1 stack and DB2 hole from cpu entry area Lai Jiangshan
2020-05-26 1:48 ` [RFC PATCH 0/5] x86/hw_breakpoint: protects more cpu entry data Lai Jiangshan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=159083264193.17951.13800361200842101495.tip-bot2@tip-bot2 \
--to=tip-bot2@linutronix.de \
--cc=laijs@linux.alibaba.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-tip-commits@vger.kernel.org \
--cc=peterz@infradead.org \
--cc=tglx@linutronix.de \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®