From: Joakim Zhang <qiangqing.zhang@nxp.com>
To: robh+dt@kernel.org, shawnguo@kernel.org, festevam@gmail.com
Cc: linux-imx@nxp.com, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Joakim Zhang <qiangqing.zhang@nxp.com>
Subject: [PATCH] arm64: dts: imx8mp: add ddr pmu device node
Date: Mon, 29 Jun 2020 16:42:30 +0800 [thread overview]
Message-ID: <1593420150-30904-1-git-send-email-qiangqing.zhang@nxp.com> (raw)
Add ddr pmu device node for i.MX8MP.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 90bdef8447fa..9de2aa1c573c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -744,5 +744,11 @@
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
};
+
+ ddr-pmu@3d800000 {
+ compatible = "fsl,imx8mp-ddr-pmu", "fsl,imx8m-ddr-pmu";
+ reg = <0x3d800000 0x400000>;
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+ };
};
};
--
2.17.1
next reply other threads:[~2020-06-29 19:34 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-29 8:42 Joakim Zhang [this message]
2020-07-13 2:19 ` Shawn Guo
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