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[110.174.173.27]) by smtp.gmail.com with ESMTPSA id my9sm13652282pjb.44.2020.07.12.21.18.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Jul 2020 21:18:04 -0700 (PDT) Date: Mon, 13 Jul 2020 14:17:58 +1000 From: Nicholas Piggin Subject: Re: [PATCH 2/2] locking/pvqspinlock: Optionally store lock holder cpu into lock To: Waiman Long , Peter Zijlstra Cc: Arnd Bergmann , Borislav Petkov , Davidlohr Bueso , linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, Ingo Molnar , Thomas Gleixner , Will Deacon , x86@kernel.org References: <20200711182128.29130-1-longman@redhat.com> <20200711182128.29130-3-longman@redhat.com> <20200712173452.GB10769@hirez.programming.kicks-ass.net> In-Reply-To: MIME-Version: 1.0 Message-Id: <1594613637.ds7pt1by9l.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Excerpts from Waiman Long's message of July 13, 2020 9:05 am: > On 7/12/20 1:34 PM, Peter Zijlstra wrote: >> On Sat, Jul 11, 2020 at 02:21:28PM -0400, Waiman Long wrote: >>> The previous patch enables native qspinlock to store lock holder cpu >>> number into the lock word when the lock is acquired via the slowpath. >>> Since PV qspinlock uses atomic unlock, allowing the fastpath and >>> slowpath to put different values into the lock word will further slow >>> down the performance. This is certainly undesirable. >>> >>> The only way we can do that without too much performance impact is to >>> make fastpath and slowpath put in the same value. Still there is a slig= ht >>> performance overhead in the additional access to a percpu variable in t= he >>> fastpath as well as the less optimized x86-64 PV qspinlock unlock path. >>> >>> A new config option QUEUED_SPINLOCKS_CPUINFO is now added to enable >>> distros to decide if they want to enable lock holder cpu information in >>> the lock itself for both native and PV qspinlocks across both fastpath >>> and slowpath. If this option is not configureed, only native qspinlocks >>> in the slowpath will put the lock holder cpu information in the lock >>> word. >> And this kills it,.. if it doesn't make unconditional sense, we're not >> going to do this. It's just too ugly. >> > You mean it has to be unconditional, no option config if we want to do=20 > it. Right? >=20 > It can certainly be made unconditional after I figure out how to make=20 > the optimized PV unlock code work. Sorry I've not had a lot of time to get back to this thread and test things -- don't spend loads of effort or complexity on it until we get some more numbers. I did see some worse throughput results (with no attention to fairness) with the PV spin lock, but it was a really quick limited few tests, I need to get something a bit more substantial. I do very much appreciate your help with the powerpc patches, and interest in the PV issues though. I'll try to find more time to help out. Thanks, Nick