From: Xu Yilun <yilun.xu@intel.com>
To: lee.jones@linaro.org, linux-kernel@vger.kernel.org
Cc: trix@redhat.com, yilun.xu@intel.com,
matthew.gerlach@linux.intel.com, russell.h.weight@intel.com,
lgoncalv@redhat.com
Subject: [PATCH 0/2] add Intel Max10 BMC chip support
Date: Mon, 13 Jul 2020 12:34:54 +0800 [thread overview]
Message-ID: <1594614896-16606-1-git-send-email-yilun.xu@intel.com> (raw)
This patchset add basic functions for Intel Max10 BMC chip.
Patch #1 implements the main feature.
Patch #2 is a fix for the HW issue lies in the "SPI Slave to Avalon Master
bridge" IP block, which is used for communication between host and the BMC
chip.
Matthew Gerlach (1):
mfd: intel-m10-bmc: start with the last SOP on phy rx buffer parsing
Xu Yilun (1):
mfd: intel-m10-bmc: add Max10 BMC chip support for Intel FPGA PAC
.../ABI/testing/sysfs-driver-intel-m10-bmc | 15 +
drivers/mfd/Kconfig | 13 +
drivers/mfd/Makefile | 3 +
drivers/mfd/intel-m10-bmc-main.c | 176 ++++
drivers/mfd/intel-spi-avmm.c | 904 +++++++++++++++++++++
drivers/mfd/intel-spi-avmm.h | 35 +
include/linux/mfd/intel-m10-bmc.h | 57 ++
7 files changed, 1203 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-m10-bmc
create mode 100644 drivers/mfd/intel-m10-bmc-main.c
create mode 100644 drivers/mfd/intel-spi-avmm.c
create mode 100644 drivers/mfd/intel-spi-avmm.h
create mode 100644 include/linux/mfd/intel-m10-bmc.h
--
2.7.4
next reply other threads:[~2020-07-13 4:39 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-13 4:34 Xu Yilun [this message]
2020-07-13 4:34 ` [PATCH 1/2] mfd: intel-m10-bmc: add Max10 BMC chip support for Intel FPGA PAC Xu Yilun
2020-07-13 9:17 ` Lee Jones
2020-07-14 6:05 ` Xu Yilun
2020-07-14 6:50 ` Lee Jones
2020-07-14 6:52 ` Xu Yilun
2020-07-13 4:34 ` [PATCH 2/2] mfd: intel-m10-bmc: start with the last SOP on phy rx buffer parsing Xu Yilun
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