From: Mikael Pettersson <mikpe@user.it.uu.se>
To: davej@codemonkey.org.uk
Cc: linux-kernel@vger.kernel.org
Subject: Re: Enabling L2 cache for overdrive CPUs.
Date: Wed, 26 Feb 2003 15:26:27 +0100 [thread overview]
Message-ID: <15964.52883.370949.237446@gargle.gargle.HOWL> (raw)
In-Reply-To: <200302261349.h1QDn0Bh002816@deviant.impure.org.uk>
davej@codemonkey.org.uk writes:
> Some CPU overdrives (such as those made by powerleap) mean
> that we get a CPU with L2 cache disabled by default, and
> a BIOS that doesn't know how to turn it on.
> The patch below is untested, and I'd like some feedback
> from folks (preferably those with these wacky overdrives,
> but also from regular intel CPUs too - disable L2 in your
> bios and try booting with 'enable-l2' and see what happens).
...
> + cr0 = read_cr0();
> + cr0 |= 1<<30;
> + write_cr0 (cr0);
> +
> + rdmsr (0x11e, lo, hi);
> + lo |= 0x40101;
> + wrmsr (0x11e, lo, hi);
> +
> + cr0 &= ~(1<<30);
> + write_cr0 (cr0);
> +
> + wbinvd();
Ugh. Is this for the PII overdrive for PPro socket or what?
Seems awfully dangerous to have a __setup() clobber MSRs without
checking the cpuid first.
Shouldn't this be in the CPU detection/quirks code instead?
It already contains stuff similar to this.
/Mikael
next prev parent reply other threads:[~2003-02-26 14:16 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-02-26 13:49 davej
2003-02-26 14:26 ` Mikael Pettersson [this message]
2003-02-26 16:31 ` Dave Jones
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