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Fri, 28 Aug 2020 06:40:08 -0700 Received: from [10.140.6.59] (helo=xhdshubhraj40.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1kBebw-0005it-0j; Fri, 28 Aug 2020 06:40:08 -0700 From: Shubhrajyoti Datta To: linux-clk@vger.kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, devel@driverdev.osuosl.org, sboyd@kernel.org, robh+dt@kernel.org, gregkh@linuxfoundation.org, mturquette@baylibre.com, Shubhrajyoti Datta Subject: [PATCH v6 1/8] dt-bindings: add documentation of xilinx clocking wizard Date: Fri, 28 Aug 2020 19:09:49 +0530 Message-Id: <1598621996-31040-2-git-send-email-shubhrajyoti.datta@xilinx.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1598621996-31040-1-git-send-email-shubhrajyoti.datta@xilinx.com> References: <1598621996-31040-1-git-send-email-shubhrajyoti.datta@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email MIME-Version: 1.0 Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: 37c71119-db78-48e2-2d8a-08d84b57e3e1 X-MS-TrafficTypeDiagnostic: MW2PR02MB3884: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:546; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Aug 2020 13:40:13.0248 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 37c71119-db78-48e2-2d8a-08d84b57e3e1 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-AuthSource: SN1NAM02FT049.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW2PR02MB3884 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the devicetree binding for the xilinx clocking wizard. Signed-off-by: Shubhrajyoti Datta --- v6: Fix a yaml warning .../bindings/clock/xlnx,clocking-wizard.yaml | 71 ++++++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml diff --git a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml new file mode 100644 index 0000000..ca63593 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/xlnx,clocking-wizard.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx clocking wizard + +maintainers: + - Shubhrajyoti Datta + +description: | + The clocking wizard is a soft ip clocking block of Xilinx versal. It + reads required input clock frequencies from the devicetree and acts as clock + clock output. + +select: false + +properties: + compatible: + items: + - enum: + - xlnx,clocking-wizard + - xlnx,clocking-wizard-6.0 + + "#clock-cells": + const: 1 + + clocks: + description: List of clock specifiers which are external input + clocks to the given clock controller. + items: + - description: clock input + - description: axi clock + + clock-names: + items: + - const: clk_in1 + - const: s_axi_aclk + + speed-grade: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [1, 2, 3] + description: + Speed grade of the device. + maxItems: 1 + +required: + - compatible + - "#clock-cells" + - clocks + - clock-names + - speed-grade + +additionalProperties: false + +examples: + - | + clock-generator@40040000 { + #clock-cells = <1>; + reg = <0x40040000 0x1000>; + compatible = "xlnx,clk-wizard-1.0"; + speed-grade = <1>; + clock-names = "clk_in1", "s_axi_aclk"; + clocks = <&clkc 15>, <&clkc 15>; + clock-output-names = "clk_out1", "clk_out2", + "clk_out3", "clk_out4", "clk_out5", + "clk_out6", "clk_out7"; + }; +... -- 2.1.1