From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
Nicolas Boichat <drinkcat@chromium.org>
Cc: James Liao <jamesjj.liao@mediatek.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>, <linux-clk@vger.kernel.org>,
<srv_heupstream@mediatek.com>, Weiyi Lu <weiyi.lu@mediatek.com>,
Wendell Lin <wendell.lin@mediatek.com>
Subject: [PATCH v3 5/9] dt-bindings: ARM: Mediatek: Document bindings for MT8192 APU and GPU
Date: Thu, 3 Sep 2020 11:22:56 +0800 [thread overview]
Message-ID: <1599103380-4155-6-git-send-email-weiyi.lu@mediatek.com> (raw)
In-Reply-To: <1599103380-4155-1-git-send-email-weiyi.lu@mediatek.com>
This patch adds the binding documentation of ipesys and mfgcfg
for Mediatek MT8192.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
---
Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt | 1 +
Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt | 1 +
2 files changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt
index 2ce889b..9cd1035 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt
@@ -7,6 +7,7 @@ Required Properties:
- compatible: Should be one of:
- "mediatek,mt6779-ipesys", "syscon"
+ - "mediatek,mt8192-ipesys", "syscon"
- #clock-cells: Must be 1
The ipesys controller uses the common clk binding from
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt
index ad5f9d2..fc1ce61 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt
@@ -9,6 +9,7 @@ Required Properties:
- "mediatek,mt2712-mfgcfg", "syscon"
- "mediatek,mt6779-mfgcfg", "syscon"
- "mediatek,mt8183-mfgcfg", "syscon"
+ - "mediatek,mt8192-mfgcfg", "syscon"
- #clock-cells: Must be 1
The mfgcfg controller uses the common clk binding from
--
1.8.1.1.dirty
next prev parent reply other threads:[~2020-09-03 3:23 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-03 3:22 [PATCH v3 0/9] Mediatek MT8192 clock support Weiyi Lu
2020-09-03 3:22 ` [PATCH v3 1/9] dt-bindings: ARM: Mediatek: Document bindings for MT8192 BSP Weiyi Lu
2020-09-03 3:22 ` [PATCH v3 2/9] dt-bindings: ARM: Mediatek: Document bindings for MT8192 Audio Weiyi Lu
2020-09-03 3:22 ` [PATCH v3 3/9] dt-bindings: ARM: Mediatek: Document bindings for MT8192 Multimedia Weiyi Lu
2020-09-03 3:22 ` [PATCH v3 4/9] dt-bindings: ARM: Mediatek: Document bindings for MT8192 Camera Weiyi Lu
2020-09-03 3:22 ` Weiyi Lu [this message]
2020-09-03 3:22 ` [PATCH v3 6/9] clk: mediatek: Add dt-bindings for MT8192 clocks Weiyi Lu
2020-09-03 3:22 ` [PATCH v3 7/9] clk: mediatek: Fix asymmetrical PLL enable and disable control Weiyi Lu
2020-10-01 14:15 ` Matthias Brugger
2020-09-03 3:22 ` [PATCH v3 8/9] clk: mediatek: Add configurable enable control to mtk_pll_data Weiyi Lu
2020-09-03 3:23 ` [PATCH v3 9/9] clk: mediatek: Add MT8192 clock support Weiyi Lu
2020-10-01 14:17 ` [PATCH v3 0/9] Mediatek " Matthias Brugger
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