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From: "tip-bot2 for Fenghua Yu" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Fenghua Yu <fenghua.yu@intel.com>, Borislav Petkov <bp@suse.de>,
	Tony Luck <tony.luck@intel.com>, x86 <x86@kernel.org>,
	LKML <linux-kernel@vger.kernel.org>
Subject: [tip: x86/pasid] x86/msr-index: Define an IA32_PASID MSR
Date: Fri, 18 Sep 2020 07:42:30 -0000	[thread overview]
Message-ID: <160041495087.15536.13150699323092837842.tip-bot2@tip-bot2> (raw)
In-Reply-To: <1600187413-163670-7-git-send-email-fenghua.yu@intel.com>

The following commit has been merged into the x86/pasid branch of tip:

Commit-ID:     f0f2f9feb4ee6f28729e5388da3c03ce1dac077a
Gitweb:        https://git.kernel.org/tip/f0f2f9feb4ee6f28729e5388da3c03ce1dac077a
Author:        Fenghua Yu <fenghua.yu@intel.com>
AuthorDate:    Tue, 15 Sep 2020 09:30:10 -07:00
Committer:     Borislav Petkov <bp@suse.de>
CommitterDate: Thu, 17 Sep 2020 20:22:15 +02:00

x86/msr-index: Define an IA32_PASID MSR

The IA32_PASID MSR (0xd93) contains the Process Address Space Identifier
(PASID), a 20-bit value. Bit 31 must be set to indicate the value
programmed in the MSR is valid. Hardware uses the PASID to identify a
process address space and direct responses to the right address space.

Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lkml.kernel.org/r/1600187413-163670-7-git-send-email-fenghua.yu@intel.com
---
 arch/x86/include/asm/msr-index.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 2859ee4..aaddc6a 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -257,6 +257,9 @@
 #define MSR_IA32_LASTINTFROMIP		0x000001dd
 #define MSR_IA32_LASTINTTOIP		0x000001de
 
+#define MSR_IA32_PASID			0x00000d93
+#define MSR_IA32_PASID_VALID		BIT_ULL(31)
+
 /* DEBUGCTLMSR bits (others vary by model): */
 #define DEBUGCTLMSR_LBR			(1UL <<  0) /* last branch recording */
 #define DEBUGCTLMSR_BTF_SHIFT		1

  reply	other threads:[~2020-09-18  7:43 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1600187413-163670-1-git-send-email-fenghua.yu@intel.com>
2020-09-15 16:30 ` [PATCH v8 2/9] iommu/vt-d: Change flags type to unsigned int in binding mm Fenghua Yu
2020-09-18  7:42   ` [tip: x86/pasid] " tip-bot2 for Fenghua Yu
2020-09-15 16:30 ` [PATCH v8 4/9] x86/cpufeatures: Enumerate ENQCMD and ENQCMDS instructions Fenghua Yu
2020-09-18  7:42   ` [tip: x86/pasid] " tip-bot2 for Fenghua Yu
2020-09-15 16:30 ` [PATCH v8 5/9] x86/fpu/xstate: Add supervisor PASID state for ENQCMD feature Fenghua Yu
2020-09-18  7:42   ` [tip: x86/pasid] x86/fpu/xstate: Add supervisor PASID state for ENQCMD tip-bot2 for Yu-cheng Yu
2020-09-15 16:30 ` [PATCH v8 6/9] x86/msr-index: Define IA32_PASID MSR Fenghua Yu
2020-09-18  7:42   ` tip-bot2 for Fenghua Yu [this message]
2020-09-15 16:30 ` [PATCH v8 9/9] x86/mmu: Allocate/free PASID Fenghua Yu
2020-09-18  7:42   ` [tip: x86/pasid] x86/mmu: Allocate/free a PASID tip-bot2 for Fenghua Yu
2021-05-29  9:17   ` [PATCH] x86/cpufeatures: Force disable X86_FEATURE_ENQCMD and remove update_pasid() Thomas Gleixner
2021-05-31  8:43     ` Borislav Petkov
2021-05-31 10:16       ` Thomas Gleixner
2021-06-02 20:37         ` Luck, Tony
2021-06-03 17:31           ` Andy Lutomirski
2021-06-09 17:32             ` Luck, Tony
2021-06-09 23:34               ` Andy Lutomirski
2021-06-25 15:46                 ` Luck, Tony
2021-06-02 10:14     ` Borislav Petkov
2021-06-02 10:20       ` Thomas Gleixner
2021-06-03 11:20       ` Vinod Koul
2021-06-03 11:42         ` Borislav Petkov
2021-06-03 12:47           ` Vinod Koul
2021-06-03 14:33             ` Borislav Petkov
2021-06-02 19:49     ` [tip: x86/urgent] " tip-bot2 for Thomas Gleixner
2021-06-03 14:38     ` tip-bot2 for Thomas Gleixner
2020-09-16  8:06 ` [PATCH v8 0/9] x86: tag application address space for devices Joerg Roedel
2020-09-17 23:53   ` Fenghua Yu
     [not found] ` <1600187413-163670-4-git-send-email-fenghua.yu@intel.com>
2020-09-17  7:53   ` [PATCH v8 3/9] Documentation/x86: Add documentation for SVA (Shared Virtual Addressing) Borislav Petkov
2020-09-17 14:56     ` Raj, Ashok
2020-09-17 17:18       ` Borislav Petkov
2020-09-17 17:22         ` Raj, Ashok
2020-09-17 17:30           ` Borislav Petkov
2020-09-18 16:22             ` Fenghua Yu
2020-09-18  7:42   ` [tip: x86/pasid] " tip-bot2 for Ashok Raj

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