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From: "tip-bot2 for Alexandru Elisei" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Alexandru Elisei <alexandru.elisei@arm.com>,
	Marc Zyngier <maz@kernel.org>, x86 <x86@kernel.org>,
	LKML <linux-kernel@vger.kernel.org>
Subject: [tip: irq/core] irqchip/gic-v3: Spell out when pseudo-NMIs are enabled
Date: Sun, 11 Oct 2020 17:57:40 -0000	[thread overview]
Message-ID: <160243906017.7002.16254456675472272691.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20200912153707.667731-2-alexandru.elisei@arm.com>

The following commit has been merged into the irq/core branch of tip:

Commit-ID:     4e594ad1068ea1db359d6161f580f03edecf6cb0
Gitweb:        https://git.kernel.org/tip/4e594ad1068ea1db359d6161f580f03edecf6cb0
Author:        Alexandru Elisei <alexandru.elisei@arm.com>
AuthorDate:    Sat, 12 Sep 2020 16:37:06 +01:00
Committer:     Marc Zyngier <maz@kernel.org>
CommitterDate: Sun, 13 Sep 2020 17:51:35 +01:00

irqchip/gic-v3: Spell out when pseudo-NMIs are enabled

When NMIs cannot be enabled, the driver prints a message stating that
unambiguously. When they are enabled, the only feedback we get is a message
regarding the use of synchronization for ICC_PMR_EL1 writes, which is not
as useful for a user who is not intimately familiar with how NMIs are
implemented.

Let's make it obvious that pseudo-NMIs are enabled. Keep the message about
using a barrier for ICC_PMR_EL1 writes, because it has a non-negligible
impact on performance.

Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200912153707.667731-2-alexandru.elisei@arm.com
---
 drivers/irqchip/irq-gic-v3.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 850842f..aa9b43d 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -1564,8 +1564,8 @@ static void gic_enable_nmi_support(void)
 	if (gic_read_ctlr() & ICC_CTLR_EL1_PMHE_MASK)
 		static_branch_enable(&gic_pmr_sync);
 
-	pr_info("%s ICC_PMR_EL1 synchronisation\n",
-		static_branch_unlikely(&gic_pmr_sync) ? "Forcing" : "Relaxing");
+	pr_info("Pseudo-NMIs enabled using %s ICC_PMR_EL1 synchronisation\n",
+		static_branch_unlikely(&gic_pmr_sync) ? "forced" : "relaxed");
 
 	static_branch_enable(&supports_pseudo_nmis);
 

  reply	other threads:[~2020-10-11 17:59 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-12 15:37 [PATCH v3 0/2] irqchip/gic-v3: Support pseudo-NMIs when SCR_EL3.FIQ == 0 Alexandru Elisei
2020-09-12 15:37 ` [PATCH v3 1/2] irqchip/gicv3: Spell out when pseudo-NMIs are enabled Alexandru Elisei
2020-10-11 17:57   ` tip-bot2 for Alexandru Elisei [this message]
2020-09-12 15:37 ` [PATCH v3 2/2] irqchip/gic-v3: Support pseudo-NMIs when SCR_EL3.FIQ == 0 Alexandru Elisei
2020-10-11 17:57   ` [tip: irq/core] " tip-bot2 for Alexandru Elisei
2020-09-13 17:05 ` [PATCH v3 0/2] " Marc Zyngier

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