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From: Abel Vesa <abel.vesa@nxp.com>
To: Stephen Boyd <sboyd@kernel.org>,
	Sascha Hauer <kernel@pengutronix.de>, Peng Fan <peng.fan@nxp.com>,
	Fabio Estevam <fabio.estevam@nxp.com>,
	Anson Huang <anson.huang@nxp.com>,
	Dong Aisheng <aisheng.dong@nxp.com>, Jacky Bai <ping.bai@nxp.com>
Cc: NXP Linux Team <linux-imx@nxp.com>,
	linux-clk@vger.kernel.org,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	Abel Vesa <abel.vesa@nxp.com>
Subject: [PATCH v2 3/5] clk: composite: Allow gate ops with only .is_enabled op
Date: Thu, 26 Nov 2020 14:40:07 +0200	[thread overview]
Message-ID: <1606394409-12755-4-git-send-email-abel.vesa@nxp.com> (raw)
In-Reply-To: <1606394409-12755-1-git-send-email-abel.vesa@nxp.com>

Some composite clocks might be enabled/disabled from outside the
clock framework. So allow the composite clock register successfully
with only the .is_enabled op for gate ops.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 drivers/clk/clk-composite.c | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
index 2ddb54f..29f00a9 100644
--- a/drivers/clk/clk-composite.c
+++ b/drivers/clk/clk-composite.c
@@ -278,17 +278,18 @@ static struct clk_hw *__clk_hw_register_composite(struct device *dev,
 	}
 
 	if (gate_hw && gate_ops) {
-		if (!gate_ops->is_enabled || !gate_ops->enable ||
-		    !gate_ops->disable) {
-			hw = ERR_PTR(-EINVAL);
-			goto err;
-		}
-
 		composite->gate_hw = gate_hw;
 		composite->gate_ops = gate_ops;
-		clk_composite_ops->is_enabled = clk_composite_is_enabled;
-		clk_composite_ops->enable = clk_composite_enable;
-		clk_composite_ops->disable = clk_composite_disable;
+		if (gate_ops->is_enabled) {
+			clk_composite_ops->is_enabled = clk_composite_is_enabled;
+		} else {
+			hw = ERR_PTR(-EINVAL);
+			goto err;
+		}
+		if (gate_ops->enable)
+			clk_composite_ops->enable = clk_composite_enable;
+		if (gate_ops->disable)
+			clk_composite_ops->disable = clk_composite_disable;
 	}
 
 	init.ops = clk_composite_ops;
-- 
2.7.4


  parent reply	other threads:[~2020-11-26 12:42 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-26 12:40 [PATCH v2 0/5] clk: imx: Register the dram_apb and dram_alt as read-only Abel Vesa
2020-11-26 12:40 ` [PATCH v2 1/5] clk: Add clk_gate_ro_ops for read-only gate clocks Abel Vesa
2020-11-26 12:40 ` [PATCH v2 2/5] clk: Add CLK_GET_PARENT_NOCACHE flag Abel Vesa
2020-11-26 12:40 ` Abel Vesa [this message]
2020-11-26 12:40 ` [PATCH v2 4/5] clk: imx: composite-8m: Add DRAM clock registration variant Abel Vesa
2020-11-26 12:40 ` [PATCH v2 5/5] clk: imx8m: Use dram variant registration for dram clocks Abel Vesa

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