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From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Enric Balletbo Serra <eballetbo@gmail.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Nicolas Boichat <drinkcat@chromium.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>,
	<srv_heupstream@mediatek.com>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	Weiyi Lu <weiyi.lu@mediatek.com>
Subject: [PATCH 0/2] Fixes for new SCPSYS power domains controller driver
Date: Mon, 4 Jan 2021 18:44:51 +0800	[thread overview]
Message-ID: <1609757093-30618-1-git-send-email-weiyi.lu@mediatek.com> (raw)

This patch is base on v5.10-rc1 and
series "Add new driver for SCPSYS power domains controller"[1]

[1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=374013

Weiyi Lu (2):
  soc: mediatek: Add regulator control for MT8192 MFG power domain
  soc: mediatek: Fix the clock prepared issue

 drivers/soc/mediatek/mt8192-pm-domains.h |  1 +
 drivers/soc/mediatek/mtk-pm-domains.c    | 73 ++++++++++++++++--------
 drivers/soc/mediatek/mtk-pm-domains.h    |  2 +
 3 files changed, 51 insertions(+), 25 deletions(-)


             reply	other threads:[~2021-01-04 10:46 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-04 10:44 Weiyi Lu [this message]
2021-01-04 10:44 ` [PATCH 1/2] soc: mediatek: Add regulator control for MT8192 MFG power domain Weiyi Lu
2021-01-11  7:07   ` Hsin-Yi Wang
2021-01-04 10:44 ` [PATCH 2/2] soc: mediatek: Fix the clock prepared issue Weiyi Lu

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