From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FDE5C43381 for ; Tue, 5 Jan 2021 22:08:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4D0E922D75 for ; Tue, 5 Jan 2021 22:08:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731721AbhAEWIY (ORCPT ); Tue, 5 Jan 2021 17:08:24 -0500 Received: from mail.kernel.org ([198.145.29.99]:40144 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729536AbhAEWHw (ORCPT ); Tue, 5 Jan 2021 17:07:52 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id 48D9322DFB; Tue, 5 Jan 2021 22:07:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1609884432; bh=eSEXOr41V/dBpsepFxXoVybj3TSEep3A1pAtN7NQDEA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IBNd20msi0GKzy9EZ413szRxyQFByA2T3rvR8Vutp/ZAo0nM1NBs3LGyr/A0twlKf Weg5Lk8+/BeFIvXhpp3uqjFihD4fwDB6YKzqr+w39ZmACRNObBtoMLk2vkcc6wfdgg vFbaNRZULRaGgTGrsJXcBGoMwWLOIZOQC3J5R6oMOtr0gMEylqvNXd19a8m/tj0jLk j8IuzwtmuSigav1t4ghngbinXLg2yyxAPZsRncva55j8OTtTSv13pcyUqVWtzVX8mo eDQdDiqBSCW/gtw3K7mW5PyD3ZiVEg4YJjm8w8Tt04S/cpMc6mnBSgRkhBLCp2SvSv 8SlWzg3Lc+ACg== From: Will Deacon To: Borislav Petkov , iommu@lists.linux-foundation.org, David Woodhouse Cc: catalin.marinas@arm.com, kernel-team@android.com, Will Deacon , Thomas Gleixner , "Rafael J. Wysocki" , Greg Kroah-Hartman , lkml Subject: Re: [PATCH] iommu/amd: Set iommu->int_enabled consistently when interrupts are set up Date: Tue, 5 Jan 2021 22:07:01 +0000 Message-Id: <160987442134.30234.7295735708927658122.b4-ty@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <50cd5f55be8ead0937ac315cd2f5b89364f6a9a5.camel@infradead.org> References: <20210104132250.GE32151@zn.tnic> <20210104232353.GJ32151@zn.tnic> <50cd5f55be8ead0937ac315cd2f5b89364f6a9a5.camel@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 05 Jan 2021 01:32:51 +0000, David Woodhouse wrote: > When I made the INTCAPXT support stop gratuitously pretending to be MSI, > I missed the fact that iommu_setup_msi() also sets the ->int_enabled > flag. I missed this in the iommu_setup_intcapxt() code path, which means > that a resume from suspend will try to allocate the IRQ domains again, > accidentally re-enabling interrupts as it does, resulting in much sadness. > > Lift out the bit which sets iommu->int_enabled into the iommu_init_irq() > function which is also where it gets checked. Applied to arm64 (for-next/iommu/fixes), thanks! [1/1] iommu/amd: Set iommu->int_enabled consistently when interrupts are set up https://git.kernel.org/arm64/c/12bc4570c14e Cheers, -- Will https://fixes.arm64.dev https://next.arm64.dev https://will.arm64.dev