From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2ECD2C433E0 for ; Sun, 31 Jan 2021 10:51:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D803564E1F for ; Sun, 31 Jan 2021 10:51:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230220AbhAaKut (ORCPT ); Sun, 31 Jan 2021 05:50:49 -0500 Received: from mx0a-0016f401.pphosted.com ([67.231.148.174]:39140 "EHLO mx0b-0016f401.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S230346AbhAaJzn (ORCPT ); Sun, 31 Jan 2021 04:55:43 -0500 Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 10V9cNJe023389; Sun, 31 Jan 2021 01:52:10 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=aSXi+ShybKDRXVs2uOeY/wKykSo1tWgMER6OrWimJFs=; b=PNY/r4d1ubN2v9uUSNdJcsf6FmD3AvJawgtQ94hKkfqtDgOPNveXtQPI7kQmoW32I4Zb vbYGNDiCYc08Q8a+ht1LLoFE10iutzx1zbBq9uxaCx3ljAYnGMQcdsHOL54xnpXTE91m POZP6T2f3Vs70ZBnapLf6FJ3C0NSC9eg+2CTVdhvqhxsagBVu/aXXjD/0mop84sS59IC +hnITxpoIKCkWUJ42miFd4Wm8rSsxS3WK8lO6QAtUFyb07orQ1/Zr/RJhEUixD84ORvU 65q2tNSKHzG1p/k5AL5JF5PDG31MijhF7xbGinw76g9xvAdx6o99fboDdocX2L1Ib7qP dg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com with ESMTP id 36d5psshk8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Sun, 31 Jan 2021 01:52:10 -0800 Received: from SC-EXCH02.marvell.com (10.93.176.82) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sun, 31 Jan 2021 01:52:09 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sun, 31 Jan 2021 01:52:08 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sun, 31 Jan 2021 01:52:08 -0800 Received: from stefan-pc.marvell.com (stefan-pc.marvell.com [10.5.25.21]) by maili.marvell.com (Postfix) with ESMTP id BCE563F703F; Sun, 31 Jan 2021 01:52:05 -0800 (PST) From: To: CC: , , , , , , , , , , , Subject: [PATCH v6 net-next 16/18] net: mvpp2: set 802.3x GoP Flow Control mode Date: Sun, 31 Jan 2021 11:51:02 +0200 Message-ID: <1612086664-23972-17-git-send-email-stefanc@marvell.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1612086664-23972-1-git-send-email-stefanc@marvell.com> References: <1612086664-23972-1-git-send-email-stefanc@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369,18.0.737 definitions=2021-01-31_03:2021-01-29,2021-01-31 signatures=0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Stefan Chulski This patch fix GMAC TX flow control autoneg. Flow control autoneg wrongly were disabled with enabled TX flow control. Signed-off-by: Stefan Chulski --- drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c index afa61cc..7632810 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c @@ -6282,7 +6282,7 @@ static void mvpp2_gmac_config(struct mvpp2_port *port, unsigned int mode, old_ctrl4 = ctrl4 = readl(port->base + MVPP22_GMAC_CTRL_4_REG); ctrl0 &= ~MVPP2_GMAC_PORT_TYPE_MASK; - ctrl2 &= ~(MVPP2_GMAC_INBAND_AN_MASK | MVPP2_GMAC_PCS_ENABLE_MASK); + ctrl2 &= ~(MVPP2_GMAC_INBAND_AN_MASK | MVPP2_GMAC_PCS_ENABLE_MASK | MVPP2_GMAC_FLOW_CTRL_MASK); /* Configure port type */ if (phy_interface_mode_is_8023z(state->interface)) { -- 1.9.1