From: Neeraj Upadhyay <neeraju@codeaurora.org>
To: catalin.marinas@arm.com, will@kernel.org,
saiprakash.ranjan@codeaurora.org, robh@kernel.org,
konrad.dybcio@somainline.org
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Neeraj Upadhyay <neeraju@codeaurora.org>
Subject: [PATCH] arm64: Add part number for Arm Cortex-A78
Date: Wed, 17 Feb 2021 22:14:11 +0530 [thread overview]
Message-ID: <1613580251-12694-1-git-send-email-neeraju@codeaurora.org> (raw)
Add the MIDR part number info for the Arm Cortex-A78.
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
---
arch/arm64/include/asm/cputype.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index ef5b040..3aced88 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -72,6 +72,7 @@
#define ARM_CPU_PART_CORTEX_A76 0xD0B
#define ARM_CPU_PART_NEOVERSE_N1 0xD0C
#define ARM_CPU_PART_CORTEX_A77 0xD0D
+#define ARM_CPU_PART_CORTEX_A78 0xD41
#define APM_CPU_PART_POTENZA 0x000
@@ -109,6 +110,7 @@
#define MIDR_CORTEX_A76 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76)
#define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1)
#define MIDR_CORTEX_A77 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77)
+#define MIDR_CORTEX_A78 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78)
#define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
#define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)
--
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next reply other threads:[~2021-02-17 16:45 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-17 16:44 Neeraj Upadhyay [this message]
2021-02-17 17:06 ` Will Deacon
2021-02-17 18:07 ` Neeraj Upadhyay
2021-02-19 17:52 ` Will Deacon
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