From: Hui Tang <tanghui20@huawei.com>
To: <herbert@gondor.apana.org.au>, <davem@davemloft.net>
Cc: <linux-crypto@vger.kernel.org>, <xuzaibo@huawei.com>,
<wangzhou1@hisilicon.com>, <linux-kernel@vger.kernel.org>
Subject: [PATCH 6/8] crypto: hisilicon/hpre - use 'GENMASK' to generate mask value
Date: Mon, 10 May 2021 17:06:49 +0800 [thread overview]
Message-ID: <1620637611-41643-7-git-send-email-tanghui20@huawei.com> (raw)
In-Reply-To: <1620637611-41643-1-git-send-email-tanghui20@huawei.com>
Use 'GENMASK' to generate mask value, just make the code clearer.
Signed-off-by: Hui Tang <tanghui20@huawei.com>
---
drivers/crypto/hisilicon/hpre/hpre_crypto.c | 6 +++---
drivers/crypto/hisilicon/hpre/hpre_main.c | 8 +++++++-
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/hisilicon/hpre/hpre_crypto.c b/drivers/crypto/hisilicon/hpre/hpre_crypto.c
index 3a3af82..fb8e9c0 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_crypto.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_crypto.c
@@ -326,9 +326,9 @@ static int hpre_alg_res_post_hf(struct hpre_ctx *ctx, struct hpre_sqe *sqe,
#define HPRE_NO_HW_ERR 0
#define HPRE_HW_TASK_DONE 3
-#define HREE_HW_ERR_MASK 0x7ff
-#define HREE_SQE_DONE_MASK 0x3
-#define HREE_ALG_TYPE_MASK 0x1f
+#define HREE_HW_ERR_MASK GENMASK(10, 0)
+#define HREE_SQE_DONE_MASK GENMASK(1, 0)
+#define HREE_ALG_TYPE_MASK GENMASK(4, 0)
id = (int)le16_to_cpu(sqe->tag);
req = ctx->req_list[id];
hpre_rm_req_from_ctx(req);
diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c
index 1e7d1fb..b94185a 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_main.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_main.c
@@ -36,7 +36,7 @@
#define HPRE_INT_MASK 0x301400
#define HPRE_INT_STATUS 0x301800
#define HPRE_CORE_INT_ENABLE 0
-#define HPRE_CORE_INT_DISABLE 0x003fffff
+#define HPRE_CORE_INT_DISABLE GENMASK(21, 0)
#define HPRE_RDCHN_INI_ST 0x301a00
#define HPRE_CLSTR_BASE 0x302000
#define HPRE_CORE_EN_OFFSET 0x04
@@ -75,6 +75,12 @@
#define HPRE_BD_USR_MASK 0x3
#define HPRE_CLUSTER_CORE_MASK_V2 0xf
#define HPRE_CLUSTER_CORE_MASK_V3 0xff
+#define HPRE_QM_USR_CFG_MASK GENMASK(31, 1)
+#define HPRE_QM_AXI_CFG_MASK GENMASK(15, 0)
+#define HPRE_QM_VFG_AX_MASK GENMASK(7, 0)
+#define HPRE_BD_USR_MASK GENMASK(1, 0)
+#define HPRE_CLUSTER_CORE_MASK_V2 GENMASK(3, 0)
+#define HPRE_CLUSTER_CORE_MASK_V3 GENMASK(7, 0)
#define HPRE_AM_OOO_SHUTDOWN_ENB 0x301044
#define HPRE_AM_OOO_SHUTDOWN_ENABLE BIT(0)
--
2.8.1
next prev parent reply other threads:[~2021-05-10 9:10 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-10 9:06 [PATCH 0/8] crypto: hisilicon/hpre - fix coding style Hui Tang
2021-05-10 9:06 ` [PATCH 1/8] crypto: hisilicon/hpre - the macro 'HPRE_ADDR' expands Hui Tang
2021-05-10 9:06 ` [PATCH 2/8] crypto: hisilicon/hpre - init a structure member each line Hui Tang
2021-05-10 9:06 ` [PATCH 3/8] crypto: hisilicon/hpre - replace macro with inline function Hui Tang
2021-05-10 9:06 ` [PATCH 4/8] crypto: hisilicon/hpre - remove the macro of 'HPRE_DEV' Hui Tang
2021-05-10 9:06 ` [PATCH 5/8] crypto: hisilicon/hpre - delete rudundant initialization Hui Tang
2021-05-10 9:06 ` Hui Tang [this message]
2021-05-10 12:05 ` [PATCH 6/8] crypto: hisilicon/hpre - use 'GENMASK' to generate mask value kernel test robot
2021-05-10 9:06 ` [PATCH 7/8] crypto: hisilicon/hpre - delete rudundant macro definition Hui Tang
2021-05-10 9:06 ` [PATCH 8/8] crypto: hisilicon/hpre - add 'default' for switch statement Hui Tang
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