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[60.242.147.73]) by smtp.gmail.com with ESMTPSA id t1sm4659988pjs.20.2021.06.17.03.00.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Jun 2021 03:00:27 -0700 (PDT) Date: Thu, 17 Jun 2021 20:00:22 +1000 From: Nicholas Piggin Subject: Re: [RFC][PATCH] sched: Use lightweight hazard pointers to grab lazy mms To: Andy Lutomirski , Peter Zijlstra Cc: Andrew Morton , Dave Hansen , Linux Kernel Mailing List , linux-mm@kvack.org, Mathieu Desnoyers , "Paul E. McKenney" , Rik van Riel , the arch/x86 maintainers References: <1623816595.myt8wbkcar.astroid@bobo.none> <617cb897-58b1-8266-ecec-ef210832e927@kernel.org> <1623893358.bbty474jyy.astroid@bobo.none> <58b949fb-663e-4675-8592-25933a3e361c@www.fastmail.com> In-Reply-To: MIME-Version: 1.0 Message-Id: <1623923470.ex9n1iunep.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Excerpts from Peter Zijlstra's message of June 17, 2021 7:10 pm: > On Thu, Jun 17, 2021 at 11:08:03AM +0200, Peter Zijlstra wrote: >> On Wed, Jun 16, 2021 at 10:32:15PM -0700, Andy Lutomirski wrote: >=20 >> --- a/arch/x86/include/asm/mmu.h >> +++ b/arch/x86/include/asm/mmu.h >> @@ -66,4 +66,9 @@ typedef struct { >> void leave_mm(int cpu); >> #define leave_mm leave_mm >> =20 >> +/* On x86, mm_cpumask(mm) contains all CPUs that might be lazily using = mm */ >> +#define for_each_possible_lazymm_cpu(cpu, mm) \ >> + for_each_cpu((cpu), mm_cpumask((mm))) >> + >> + >> #endif /* _ASM_X86_MMU_H */ >=20 >> diff --git a/kernel/sched/core.c b/kernel/sched/core.c >> index 8ac693d542f6..e102ec53c2f6 100644 >> --- a/kernel/sched/core.c >> +++ b/kernel/sched/core.c >> @@ -19,6 +19,7 @@ >> =20 >=20 >> + >> +#ifndef for_each_possible_lazymm_cpu >> +#define for_each_possible_lazymm_cpu(cpu, mm) for_each_online_cpu((cpu)= ) >> +#endif >> + >=20 > Why can't the x86 implementation be the default? IIRC the problem with > mm_cpumask() is that (some) architectures don't clear bits, but IIRC > they all should be setting bits, or were there archs that didn't even do > that? There are. alpha, arm64, hexagon (of the SMP supporting ones), AFAICT. I have a patch for alpha though (it's 2 lines :)) Thanks, Nick