From: Kai Ye <yekai13@huawei.com>
To: <herbert@gondor.apana.org.au>
Cc: <linux-crypto@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<wangzhou1@hisilicon.com>, <yekai13@huawei.com>
Subject: [PATCH] crypto: hisilicon/sec - fix the process of disabling sva prefetching
Date: Sat, 26 Jun 2021 10:50:33 +0800 [thread overview]
Message-ID: <1624675833-20107-1-git-send-email-yekai13@huawei.com> (raw)
The open interface of the sva prefetching function is distinguish the chip
version. But the close interface of the sva prefetching function doesn't
distinguish the chip version. As a result, the sva prefetching close
operation is also performed on Kunpeng920, those registers are important
on Kunpeng920, which eventually leads to abnormal hardware problems. So
need to fix it immediately.
Signed-off-by: Kai Ye <yekai13@huawei.com>
---
drivers/crypto/hisilicon/sec2/sec_main.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c
index 8ab4e67..710ea8d 100644
--- a/drivers/crypto/hisilicon/sec2/sec_main.c
+++ b/drivers/crypto/hisilicon/sec2/sec_main.c
@@ -363,6 +363,9 @@ static void sec_close_sva_prefetch(struct hisi_qm *qm)
u32 val;
int ret;
+ if (qm->ver < QM_HW_V3)
+ return;
+
val = readl_relaxed(qm->io_base + SEC_PREFETCH_CFG);
val |= SEC_PREFETCH_DISABLE;
writel(val, qm->io_base + SEC_PREFETCH_CFG);
--
2.7.4
next reply other threads:[~2021-06-26 2:51 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-26 2:50 Kai Ye [this message]
2021-06-28 3:32 ` Herbert Xu
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