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Wed, 21 Oct 2026 04:47:51 -0700 (PDT) Received: from [10.217.240.81] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3673b1d0ab7sm7077539eec.0.2026.10.21.04.47.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 21 Oct 2026 04:47:51 -0700 (PDT) Message-ID: <162c8c6d-800b-46f5-92e4-3a5501ff9d12@oss.qualcomm.com> Date: Wed, 21 Oct 2026 17:17:44 +0530 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/4] dt-bindings: cache: qcom,llcc: allow optional second interrupt for LCP/SRP ECC To: Krzysztof Kozlowski Cc: Bjorn Andersson , Konrad Dybcio , Conor Dooley , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Manivannan Sadhasivam , Borislav Petkov , Tony Luck , Conor Dooley , Abel Vesa , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org References: <20261014-master-v1-0-aba3cfcfbac9@oss.qualcomm.com> <20261014-master-v1-1-aba3cfcfbac9@oss.qualcomm.com> <20261017-shaggy-funny-pogona-69fe36@quoll> Content-Language: en-US From: Faiyaz Mohammed In-Reply-To: <20261017-shaggy-funny-pogona-69fe36@quoll> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIxMDA0NiBTYWx0ZWRfX6L0K9yiVX7B+ 5IjwmZJY12TVkmdKNfevjwMuiipVtChfwSB+KpP4dPj2kXtoSXoh9xiH4ciDsFhN9nsPvNNUttz 9ZkZDa6iI7/C6I2FlICDhjPDrEdPsCOrw+FUDFz21QEwIoQqro4C/ny4tx5dCkt1WxZQDsQ3c6v nqsHRGi4Lp7Js/WL1ifdR/EQeH89XfuIa0HF/xnrg89RKAaImSrh2z5MeTgJ+CrhlHA6Y2LocP4 HeRxGUq5TyEjUJybzBQ6NdPkSs7x3EraNmMlI88igOhv1Qi52H9PWQ5fHus6WlE3bG5j0tNIeE2 wHn1H9B8ORr0KALp08Sz8J+BLW5HAZJKB4uGEEeuedNE9maXaCMdkCS9AXeVX9cPcRzahPI51cO gIPIFZcJte8T+n/4AtSsL/GqUj7bvVUI5wzI1rJQeGFgmjd8c4/PLoks9kbtBUvQGkycPJUdYsS jFzvcl3fOF98TWdbE6w== X-Proofpoint-ORIG-GUID: QijJppx02Sz51UM4LdXsxqoWS2abdbba X-Proofpoint-GUID: QijJppx02Sz51UM4LdXsxqoWS2abdbba X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIxMDA0NiBTYWx0ZWRfX3EMxgh25iT1q j+HHeECEQDv+RHJvXKxPjw2Pmb1yz+in832a+7HaRMc1uD04oHC3G9srI6zM3J9nIxSA0yG5i5w IWoZ6nryO1vRmX0nNccCI1ksZBmv2Eo= X-Authority-Analysis: v=2.4 cv=HL5WhYtv c=1 sm=1 tr=0 ts=6ad8a669 cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=79Y9q3_J_5CQFoj6QLUA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=scEy_gLbYbu1JhEsrz4S:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-21_03,2026-10-21_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 adultscore=0 impostorscore=0 clxscore=1015 phishscore=0 suspectscore=0 bulkscore=0 malwarescore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610210046 On 17-10-2026 22:04, Krzysztof Kozlowski wrote: > On Wed, Oct 14, 2026 at 09:26:16PM +0530, Faiyaz Mohammed wrote: >> QCM2390 (Shikra) has an LCP/SRP block that signals DDR DRAM ECC errors >> on a dedicated interrupt line separate from the existing TRP/DRP cache >> ECC interrupt. >> >> Allow an optional second interrupt in the LLCC binding, add >> interrupt-names with "llcc-ecc" and "llcc-lcp-ecc", and enforce both >> are present when compatible is qcom,shikra-llcc. >> >> Signed-off-by: Faiyaz Mohammed >> --- >> .../devicetree/bindings/cache/qcom,llcc.yaml | 26 +++++++++++++++++++++- >> 1 file changed, 25 insertions(+), 1 deletion(-) >> >> diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml >> index 2141e5d4de63..3546cf7c2519 100644 >> --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml >> +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml >> @@ -64,7 +64,17 @@ properties: >> maxItems: 18 >> >> interrupts: >> - maxItems: 1 >> + minItems: 1 >> + items: >> + - description: TRP/DRP LLCC cache ECC (ddrss_apps_interrupt[2]) >> + - description: LCP/SRP DDR DRAM ECC (ddrss_apps_interrupt[1]), present >> + on platforms with an LCP/SRP block such as QCM2390 >> + >> + interrupt-names: >> + minItems: 1 >> + items: >> + - const: llcc-ecc > > ecc > >> + - const: llcc-lcp-ecc > > lcp > Done — renamed to "ecc" and "lcp" in both the binding and the Shikra DTS node. Also addressing the Sashiko finding in the same patch: added an else clause restoring maxItems: 1 for all non-Shikra platforms. >> >> memory-region: >> maxItems: 1 >> @@ -234,6 +244,20 @@ allOf: >> - const: llcc1_base >> - const: llcc_broadcast_base >> >> + - if: >> + properties: >> + compatible: >> + contains: >> + const: qcom,shikra-llcc >> + then: >> + properties: >> + interrupts: >> + minItems: 2 >> + interrupt-names: >> + minItems: 2 >> + required: >> + - interrupt-names > > Please address other comments/emails. > Done. > Best regards, > Krzysztof Thanks & regards, Mohammed Faiyaz