From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C3B2C433EF for ; Tue, 28 Sep 2021 15:25:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 478DB6108F for ; Tue, 28 Sep 2021 15:25:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241549AbhI1P1M (ORCPT ); Tue, 28 Sep 2021 11:27:12 -0400 Received: from mga14.intel.com ([192.55.52.115]:12961 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241455AbhI1P1K (ORCPT ); Tue, 28 Sep 2021 11:27:10 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10121"; a="224381066" X-IronPort-AV: E=Sophos;i="5.85,329,1624345200"; d="scan'208";a="224381066" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2021 08:23:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,329,1624345200"; d="scan'208";a="538340410" Received: from otc-lr-04.jf.intel.com ([10.54.39.41]) by fmsmga004.fm.intel.com with ESMTP; 28 Sep 2021 08:23:40 -0700 From: kan.liang@linux.intel.com To: peterz@infradead.org Cc: linux-kernel@vger.kernel.org, ak@linux.intel.com, Kan Liang Subject: [PATCH] perf/x86/intel: Update event constraints for ICX Date: Tue, 28 Sep 2021 08:19:03 -0700 Message-Id: <1632842343-25862-1-git-send-email-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.7.4 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kan Liang According to the latest event list, the event encoding 0xEF is only available on the first 4 counters. Add it into the event constraints table. Fixes: 6017608936c1 ("perf/x86/intel: Add Icelake support") Signed-off-by: Kan Liang --- arch/x86/events/intel/core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 7011e87..9a04443 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -263,6 +263,7 @@ static struct event_constraint intel_icl_event_constraints[] = { INTEL_EVENT_CONSTRAINT_RANGE(0xa8, 0xb0, 0xf), INTEL_EVENT_CONSTRAINT_RANGE(0xb7, 0xbd, 0xf), INTEL_EVENT_CONSTRAINT_RANGE(0xd0, 0xe6, 0xf), + INTEL_EVENT_CONSTRAINT(0xef, 0xf), INTEL_EVENT_CONSTRAINT_RANGE(0xf0, 0xf4, 0xf), EVENT_CONSTRAINT_END }; -- 2.7.4