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([2a01:e0a:c:37e0:ced3:55bd:f454:e722]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-378e73f9a22sm17878482f8f.61.2024.09.20.08.36.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 20 Sep 2024 08:36:28 -0700 (PDT) Message-ID: <16352ae0-7e61-440d-8c04-7ec912f9bf9a@redhat.com> Date: Fri, 20 Sep 2024 17:36:26 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] drm/amdgpu: add dce6 drm_panic support To: Alex Deucher , Lu Yao Cc: ckoenig.leichtzumerken@gmail.com, daniel@ffwll.ch, Xinhui.Pan@amd.com, airlied@gmail.com, alexander.deucher@amd.com, amd-gfx@lists.freedesktop.org, christian.koenig@amd.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, srinivasan.shanmugam@amd.com, sunil.khatri@amd.com References: <20240802071752.116541-1-yaolu@kylinos.cn> <20240812060914.102614-1-yaolu@kylinos.cn> Content-Language: en-US, fr From: Jocelyn Falempe In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 17/09/2024 15:21, Alex Deucher wrote: > On Mon, Aug 12, 2024 at 2:10 AM Lu Yao wrote: >> >> Add support for the drm_panic module, which displays a pretty user >> friendly message on the screen when a Linux kernel panic occurs. >> >> Signed-off-by: Lu Yao > > Patch looks good to me. Any chance you want to convert the other > non-DC dce files (dce_v8_0.c, dce_v10_0.c, dce_v11_0.c) while you are > at it? I've made a similar patch in amdgpu_dm_plane.c, and it works on a Radeon pro w6400. But it only works when I'm in a VT terminal (so the framebuffer is linear and CPU accessible). When under Gnome/Wayland, the flag AMDGPU_GEM_CREATE_NO_CPU_ACCESS is set, so that means I can't vmap it ? Also I don't know if there is a similar way to disable tiling/compression on this hardware. Best regards, -- Jocelyn > > Alex > > >> --- >> Changes in v2: >> 1. Drop include "drm_internal.h" >> 2. Add disabling DC tiling ops. >> Per suggestion from previous thread: >> https://patchwork.freedesktop.org/patch/606879/?series=136832&rev=1 >> --- >> drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 48 +++++++++++++++++++++++++++ >> 1 file changed, 48 insertions(+) >> >> diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c >> index 05c0df97f01d..ba1b7a36caa3 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c >> +++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c >> @@ -28,6 +28,7 @@ >> #include >> #include >> #include >> +#include >> >> #include "amdgpu.h" >> #include "amdgpu_pm.h" >> @@ -2600,6 +2601,52 @@ static const struct drm_crtc_helper_funcs dce_v6_0_crtc_helper_funcs = { >> .get_scanout_position = amdgpu_crtc_get_scanout_position, >> }; >> >> +static int dce_v6_0_drm_primary_plane_get_scanout_buffer(struct drm_plane *plane, >> + struct drm_scanout_buffer *sb) >> +{ >> + struct drm_framebuffer *fb; >> + struct amdgpu_bo *abo; >> + struct amdgpu_crtc *amdgpu_crtc; >> + struct amdgpu_device *adev; >> + uint32_t fb_format; >> + >> + if (!plane->fb) >> + return -EINVAL; >> + >> + fb = plane->fb; >> + >> + abo = gem_to_amdgpu_bo(fb->obj[0]); >> + amdgpu_crtc = to_amdgpu_crtc(plane->crtc); >> + adev = drm_to_adev(fb->dev); >> + >> + if (!abo->kmap.virtual && >> + ttm_bo_kmap(&abo->tbo, 0, PFN_UP(abo->tbo.base.size), &abo->kmap)) { >> + DRM_WARN("amdgpu bo map failed, panic won't be displayed\n"); >> + return -ENOMEM; >> + } >> + >> + if (abo->kmap.bo_kmap_type & TTM_BO_MAP_IOMEM_MASK) >> + iosys_map_set_vaddr_iomem(&sb->map[0], abo->kmap.virtual); >> + else >> + iosys_map_set_vaddr(&sb->map[0], abo->kmap.virtual); >> + >> + sb->width = fb->width; >> + sb->height = fb->height; >> + sb->format = fb->format; >> + sb->pitch[0] = fb->pitches[0]; >> + >> + /* Disable DC tiling */ >> + fb_format = RREG32(mmGRPH_CONTROL + amdgpu_crtc->crtc_offset); >> + fb_format &= ~GRPH_ARRAY_MODE(0x7); >> + WREG32(mmGRPH_CONTROL + amdgpu_crtc->crtc_offset, fb_format); >> + >> + return 0; >> +} >> + >> +static const struct drm_plane_helper_funcs dce_v6_0_drm_primary_plane_helper_funcs = { >> + .get_scanout_buffer = dce_v6_0_drm_primary_plane_get_scanout_buffer >> +}; >> + >> static int dce_v6_0_crtc_init(struct amdgpu_device *adev, int index) >> { >> struct amdgpu_crtc *amdgpu_crtc; >> @@ -2627,6 +2674,7 @@ static int dce_v6_0_crtc_init(struct amdgpu_device *adev, int index) >> amdgpu_crtc->encoder = NULL; >> amdgpu_crtc->connector = NULL; >> drm_crtc_helper_add(&amdgpu_crtc->base, &dce_v6_0_crtc_helper_funcs); >> + drm_plane_helper_add(amdgpu_crtc->base.primary, &dce_v6_0_drm_primary_plane_helper_funcs); >> >> return 0; >> } >> -- >> 2.25.1 >> >