From: Will Deacon <will@kernel.org>
To: Anshuman Khandual <anshuman.khandual@arm.com>,
linux-arm-kernel@lists.infradead.org
Cc: catalin.marinas@arm.com, kernel-team@android.com,
Will Deacon <will@kernel.org>,
Alexey Budankov <alexey.budankov@linux.intel.com>,
suzuki.poulose@arm.com, Mark Rutland <mark.rutland@arm.com>,
german.gomez@arm.com, linux-kernel@vger.kernel.org,
james.clark@arm.com
Subject: Re: [PATCH v3] drivers/perf: arm_spe: Fix consistency of SYS_PMSCR_EL1.CX
Date: Tue, 19 Jul 2022 20:56:49 +0100 [thread overview]
Message-ID: <165825301043.2954553.8589641722040434945.b4-ty@kernel.org> (raw)
In-Reply-To: <20220714061302.2715102-1-anshuman.khandual@arm.com>
On Thu, 14 Jul 2022 11:43:02 +0530, Anshuman Khandual wrote:
> The arm_spe_pmu driver will enable SYS_PMSCR_EL1.CX in order to add CONTEXT
> packets into the traces, if the owner of the perf event runs with required
> capabilities i.e CAP_PERFMON or CAP_SYS_ADMIN via perfmon_capable() helper.
>
> The value of this bit is computed in the arm_spe_event_to_pmscr() function
> but the check for capabilities happens in the pmu event init callback i.e
> arm_spe_pmu_event_init(). This suggests that the value of the CX bit should
> remain consistent for the duration of the perf session.
>
> [...]
Applied to will (for-next/perf), thanks!
[1/1] drivers/perf: arm_spe: Fix consistency of SYS_PMSCR_EL1.CX
https://git.kernel.org/will/c/92f2b8bafa3d
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
prev parent reply other threads:[~2022-07-19 19:57 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-14 6:13 Anshuman Khandual
2022-07-14 11:10 ` Suzuki K Poulose
2022-07-18 4:25 ` Anshuman Khandual
2022-07-18 9:30 ` James Clark
2022-07-18 9:42 ` Suzuki K Poulose
2022-07-18 9:47 ` James Clark
2022-07-18 10:21 ` Suzuki K Poulose
2022-07-19 19:56 ` Will Deacon [this message]
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