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From: Krishna chaitanya chundru <quic_krichai@quicinc.com>
To: helgaas@kernel.org
Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org, mka@chromium.org,
	quic_vbadigan@quicinc.com, quic_hemantk@quicinc.com,
	quic_nitegupt@quicinc.com, quic_skananth@quicinc.com,
	quic_ramkri@quicinc.com, manivannan.sadhasivam@linaro.org,
	swboyd@chromium.org, dmitry.baryshkov@linaro.org,
	Krishna chaitanya chundru <quic_krichai@quicinc.com>,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konrad.dybcio@somainline.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
	FLATTENED DEVICE TREE BINDINGS)
Subject: [PATCH v4 1/2] arm64: dts: qcom: sc7280: Add missing aggre0, aggre1 clocks
Date: Thu,  8 Sep 2022 14:16:15 +0530	[thread overview]
Message-ID: <1662626776-19636-2-git-send-email-quic_krichai@quicinc.com> (raw)
In-Reply-To: <1662626776-19636-1-git-send-email-quic_krichai@quicinc.com>

Add missing aggre0, aggre1 clocks.

Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
---
changes since v3:
	- Changed the order of the clocks added.
---
 arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index ad04025..357eae1 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2043,7 +2043,9 @@
 				 <&gcc GCC_PCIE_1_SLV_AXI_CLK>,
 				 <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>,
 				 <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>,
-				 <&gcc GCC_DDRSS_PCIE_SF_CLK>;
+				 <&gcc GCC_DDRSS_PCIE_SF_CLK>,
+				 <&gcc GCC_AGGRE_NOC_PCIE_CENTER_SF_AXI_CLK>,
+				 <&gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK>;
 
 			clock-names = "pipe",
 				      "pipe_mux",
@@ -2055,7 +2057,9 @@
 				      "bus_slave",
 				      "slave_q2a",
 				      "tbu",
-				      "ddrss_sf_tbu";
+				      "ddrss_sf_tbu",
+				      "aggre0",
+				      "aggre1";
 
 			assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
 			assigned-clock-rates = <19200000>;
-- 
2.7.4


  reply	other threads:[~2022-09-08  8:47 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-08  8:46 [PATCH v4 0/2] PCI: qcom: sc7280: add missing aggre0 and " Krishna chaitanya chundru
2022-09-08  8:46 ` Krishna chaitanya chundru [this message]
2022-09-08 10:52   ` [PATCH v4 1/2] arm64: dts: qcom: sc7280: Add missing aggre0, " Krzysztof Kozlowski
2022-09-08  8:46 ` [PATCH v4 2/2] dt-bindings: pci: QCOM Add missing sc7280 " Krishna chaitanya chundru
2022-09-08 10:52   ` Krzysztof Kozlowski
2022-09-15  3:37 ` [PATCH v4 0/2] PCI: qcom: sc7280: add missing aggre0 and " Bjorn Andersson
2022-09-27  9:23 ` (subset) " Lorenzo Pieralisi

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