From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754963AbdEQOzF (ORCPT ); Wed, 17 May 2017 10:55:05 -0400 Received: from atl4mhfb04.myregisteredsite.com ([209.17.115.120]:47456 "EHLO atl4mhfb04.myregisteredsite.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753958AbdEQOzA (ORCPT ); Wed, 17 May 2017 10:55:00 -0400 X-Greylist: delayed 426 seconds by postgrey-1.27 at vger.kernel.org; Wed, 17 May 2017 10:54:59 EDT Authentication-Results: atl4mhob18.registeredsite.com; dkim=permerror (bad message/signature format) From: joshua.clayton@uniwest.com X-TCPREMOTEIP: 68.185.59.186 X-Authenticated-UID: joshua.clayton@uniwest.com To: Anatolij Gustschin Cc: linux-fpga@vger.kernel.org, Alan Tull , Moritz Fischer , linux-kernel@vger.kernel.org, Joshua Clayton Subject: Re: [PATCH] fpga: Add flag to indicate SPI bitstream is bit-reversed Date: Wed, 17 May 2017 07:47:42 -0700 Message-ID: <1665918.lT4CrqcDtW@jclayton-pc> User-Agent: KMail/5.2.3 (Linux/4.10.0-20-generic; KDE/5.31.0; x86_64; ; ) In-Reply-To: <1492724581-17034-1-git-send-email-agust@denx.de> References: <1492724581-17034-1-git-send-email-agust@denx.de> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Alanatolij, I was just finally able to test this and your other change yesterday On Thursday, April 20, 2017 11:43:01 PM PDT Anatolij Gustschin wrote: > Add a flag that is passed to the write_init() callback, > indicating that the SPI bitstream starts with LSB first. > SPI controllers usually send data with MSB first. If an > FPGA expects bitstream data as LSB first, the data must > be reversed either by the SPI controller or by the driver. > > Alternatively the bitstream could be prepared as bit-reversed > to avoid the bit-swapping while sending. This flag indicates > such bit-reversed SPI bitstream. The low-level driver will > deal with the flag and perform bit-reversing if needed. > > Signed-off-by: Anatolij Gustschin > --- > include/linux/fpga/fpga-mgr.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h > index b4ac24c..5a055a0 100644 > --- a/include/linux/fpga/fpga-mgr.h > +++ b/include/linux/fpga/fpga-mgr.h > @@ -67,10 +67,13 @@ enum fpga_mgr_states { > * FPGA Manager flags > * FPGA_MGR_PARTIAL_RECONFIG: do partial reconfiguration if supported > * FPGA_MGR_EXTERNAL_CONFIG: FPGA has been configured prior to Linux > booting + * FPGA_MGR_SPI_BITSTREAM_LSB_FIRST: SPI bitstream bit order is > reversed to + * start with LSB first > */ > #define FPGA_MGR_PARTIAL_RECONFIG BIT(0) > #define FPGA_MGR_EXTERNAL_CONFIG BIT(1) > #define FPGA_MGR_ENCRYPTED_BITSTREAM BIT(2) > +#define FPGA_MGR_SPI_BITSTREAM_LSB_FIRST BIT(3) My thought here is that FPGA_MGR_BITSTREAM_LSB_FIRST is a bit shorter, adequate, and could do if another upload method happened to use LSB first organized data. > > /** > * struct fpga_image_info - information specific to a FPGA image I'll preparing an updated patch series including a version of your patches -- ~Joshua A Clayton