From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9753EC433FE for ; Mon, 24 Oct 2022 02:05:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230020AbiJXCFj (ORCPT ); Sun, 23 Oct 2022 22:05:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36458 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229872AbiJXCFU (ORCPT ); Sun, 23 Oct 2022 22:05:20 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 088CC36BC1 for ; Sun, 23 Oct 2022 19:05:15 -0700 (PDT) X-UUID: 9d1a13fcf8d3437eaff20afedb07cc89-20221024 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=+Dt5S48ijkH3jCYnUMI+LRyOxGVvZm4/fntXbhr+/L8=; b=jNHqiXusXN61jR0UYzuyh/f1G6u5xeDFTqgh53PebOI52i0YPSW2/IQ1j7riKHJzaiG0kwEdu8q1XfUbdao4OR8bVLX7/ZCyEes2YRtEioxKZdsYYYvS+cZTD9jY742o4/0xiCuGf+iz0ooqOF3JSHhAPht42Gded9XLy9AAXf8=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.12,REQID:1fc8aff2-a5cc-4344-a178-a614f2e4c57b,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:62cd327,CLOUDID:119e6fc8-03ab-4171-989e-341ab5339257,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 9d1a13fcf8d3437eaff20afedb07cc89-20221024 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 2025238982; Mon, 24 Oct 2022 10:05:10 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Mon, 24 Oct 2022 10:05:08 +0800 Received: from mszsdaap41.gcn.mediatek.inc (10.16.6.141) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Mon, 24 Oct 2022 10:05:08 +0800 From: To: , , , , , , , , CC: , , , , , Xinlei Lee Subject: [PATCH v13,3/3] drm: mediatek: Add mt8186 dpi compatibles and platform data Date: Mon, 24 Oct 2022 10:04:59 +0800 Message-ID: <1666577099-3859-4-git-send-email-xinlei.lee@mediatek.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1666577099-3859-1-git-send-email-xinlei.lee@mediatek.com> References: <1666577099-3859-1-git-send-email-xinlei.lee@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset="yes" Content-Transfer-Encoding: 8bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Xinlei Lee Add the compatible because use edge_cfg_in_mmsys in mt8186. Signed-off-by: Xinlei Lee Reviewed-by: CK Hu Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Nícolas F. R. A. Prado --- drivers/gpu/drm/mediatek/mtk_dpi.c | 21 +++++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++ 2 files changed, 23 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index ad87ecddf58d..325032fd5343 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -941,6 +941,24 @@ static const struct mtk_dpi_conf mt8183_conf = { .csc_enable_bit = CSC_ENABLE, }; +static const struct mtk_dpi_conf mt8186_conf = { + .cal_factor = mt8183_calculate_factor, + .reg_h_fre_con = 0xe0, + .max_clock_khz = 150000, + .output_fmts = mt8183_output_fmts, + .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts), + .edge_cfg_in_mmsys = true, + .pixels_per_iter = 1, + .is_ck_de_pol = true, + .swap_input_support = true, + .support_direct_pin = true, + .dimension_mask = HPW_MASK, + .hvsize_mask = HSIZE_MASK, + .channel_swap_shift = CH_SWAP, + .yuv422_en_bit = YUV422_EN, + .csc_enable_bit = CSC_ENABLE, +}; + static const struct mtk_dpi_conf mt8192_conf = { .cal_factor = mt8183_calculate_factor, .reg_h_fre_con = 0xe0, @@ -1091,6 +1109,9 @@ static const struct of_device_id mtk_dpi_of_ids[] = { { .compatible = "mediatek,mt8183-dpi", .data = &mt8183_conf, }, + { .compatible = "mediatek,mt8186-dpi", + .data = &mt8186_conf, + }, { .compatible = "mediatek,mt8192-dpi", .data = &mt8192_conf, }, diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index 546b79412815..3d32fbc66ac1 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -646,6 +646,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = { .data = (void *)MTK_DPI }, { .compatible = "mediatek,mt8183-dpi", .data = (void *)MTK_DPI }, + { .compatible = "mediatek,mt8186-dpi", + .data = (void *)MTK_DPI }, { .compatible = "mediatek,mt8192-dpi", .data = (void *)MTK_DPI }, { .compatible = "mediatek,mt8195-dp-intf", -- 2.18.0