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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id p15-20020a0568708a0f00b001226d2100f2sm4346552oaq.33.2022.11.01.04.55.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Nov 2022 04:55:54 -0700 (PDT) Received: (nullmailer pid 909535 invoked by uid 1000); Tue, 01 Nov 2022 11:55:54 -0000 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 From: Rob Herring To: Thippeswamy Havalige Cc: robh+dt@kernel.org, bhelgaas@google.com, michals@xilinx.com, krzysztof.kozlowski@linaro.org, linux-kernel@vger.kernel.org, nagaradhesh.yeleswarapu@amd.com, linux-pci@vger.kernel.org, bharat.kumar.gogada@amd.com, devicetree@vger.kernel.org In-Reply-To: <20221101052049.3946283-2-thippeswamy.havalige@amd.com> References: <20221101052049.3946283-1-thippeswamy.havalige@amd.com> <20221101052049.3946283-2-thippeswamy.havalige@amd.com> Message-Id: <166730310310.897892.15492131590720845659.robh@kernel.org> Subject: Re: [PATCH v2 2/2] dt-bindings: PCI: xilinx-nwl: Convert to YAML schemas of Xilinx NWL PCIe Root Port Bridge Date: Tue, 01 Nov 2022 06:55:54 -0500 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 01 Nov 2022 10:50:49 +0530, Thippeswamy Havalige wrote: > Convert to YAML schemas for Xilinx NWL PCIe Root Port Bridge > dt binding. > > Signed-off-by: Thippeswamy Havalige > --- > .../bindings/pci/xilinx-nwl-pcie.txt | 73 ---------- > .../bindings/pci/xlnx,nwl-pcie.yaml | 137 ++++++++++++++++++ > 2 files changed, 137 insertions(+), 73 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt > create mode 100644 Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml > Running 'make dtbs_check' with the schema in this patch gives the following warnings. Consider if they are expected or the schema is incorrect. These may not be new warnings. Note that it is not yet a requirement to have 0 warnings for dtbs_check. This will change in the future. Full log is available here: https://patchwork.ozlabs.org/patch/ pcie@fd0e0000: Unevaluated properties are not allowed ('iommus', 'power-domains' were unexpected) arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dtb arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dtb arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dtb arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dtb arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dtb arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dtb arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dtb arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dtb arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dtb arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dtb arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dtb arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dtb arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dtb arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.1.dtb arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dtb arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dtb arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dtb arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dtb arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dtb arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dtb