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From: Rob Herring <robh@kernel.org>
To: Anup Patel <apatel@ventanamicro.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Andrew Jones <ajones@ventanamicro.com>,
	Samuel Holland <samuel@sholland.org>,
	linux-riscv@lists.infradead.org,
	Conor Dooley <conor.dooley@microchip.com>,
	Anup Patel <anup@brainfault.org>,
	Rob Herring <robh+dt@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	devicetree@vger.kernel.org, Palmer Dabbelt <palmer@dabbelt.com>,
	linux-kernel@vger.kernel.org,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Palmer Dabbelt <palmer@rivosinc.com>,
	Atish Patra <atishp@atishpatra.org>,
	Paul Walmsley <paul.walmsley@sifive.com>
Subject: Re: [PATCH v5 2/3] dt-bindings: timer: Add bindings for the RISC-V timer device
Date: Mon, 5 Dec 2022 10:16:56 -0600	[thread overview]
Message-ID: <167025701595.1979605.16523500992587130634.robh@kernel.org> (raw)
In-Reply-To: <20221201123954.1111603-3-apatel@ventanamicro.com>


On Thu, 01 Dec 2022 18:09:53 +0530, Anup Patel wrote:
> We add DT bindings for a separate RISC-V timer DT node which can
> be used to describe implementation specific behaviour (such as
> timer interrupt not triggered during non-retentive suspend).
> 
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
> ---
>  .../bindings/timer/riscv,timer.yaml           | 52 +++++++++++++++++++
>  1 file changed, 52 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/riscv,timer.yaml
> 

Reviewed-by: Rob Herring <robh@kernel.org>

  reply	other threads:[~2022-12-05 16:17 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-01 12:39 [PATCH v5 0/3] Improve CLOCK_EVT_FEAT_C3STOP feature setting Anup Patel
2022-12-01 12:39 ` [PATCH v5 1/3] RISC-V: time: initialize hrtimer based broadcast clock event device Anup Patel
2022-12-05  0:10   ` Conor Dooley
2022-12-01 12:39 ` [PATCH v5 2/3] dt-bindings: timer: Add bindings for the RISC-V timer device Anup Patel
2022-12-05 16:16   ` Rob Herring [this message]
2022-12-01 12:39 ` [PATCH v5 3/3] clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT Anup Patel
2022-12-02  0:06   ` Rob Herring
2022-12-02  6:33     ` Anup Patel
2022-12-04 23:34       ` Conor Dooley
2022-12-05  8:17         ` Samuel Holland
2022-12-05  8:33           ` Conor Dooley
2022-12-28 11:59             ` Conor Dooley
2022-12-06 22:02         ` Lad, Prabhakar

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