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From: "irqchip-bot for Jianmin Lv" <tip-bot2@linutronix.de>
To: linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org, Jianmin Lv <lvjianmin@loongson.cn>,
	Marc Zyngier <maz@kernel.org>,
	tglx@linutronix.de
Subject: [irqchip: irq/irqchip-next] irqchip/loongson-pch-pic: Fix registration of syscore_ops
Date: Sat, 08 Apr 2023 10:45:14 -0000	[thread overview]
Message-ID: <168095071449.404.65013102195860563.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20230407083453.6305-5-lvjianmin@loongson.cn>

The following commit has been merged into the irq/irqchip-next branch of irqchip:

Commit-ID:     c84efbba46901b187994558ee0edb15f7076c9a7
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/c84efbba46901b187994558ee0edb15f7076c9a7
Author:        Jianmin Lv <lvjianmin@loongson.cn>
AuthorDate:    Fri, 07 Apr 2023 16:34:52 +08:00
Committer:     Marc Zyngier <maz@kernel.org>
CommitterDate: Sat, 08 Apr 2023 11:29:18 +01:00

irqchip/loongson-pch-pic: Fix registration of syscore_ops

When support suspend/resume for loongson-pch-pic, the syscore_ops
is registered twice in dual-bridges machines where there are two
pch-pic IRQ domains. Repeated registration of an same syscore_ops
broke syscore_ops_list, so the patch will corret it.

Fixes: 1ed008a2c331 ("irqchip/loongson-pch-pic: Add suspend/resume support")
Cc: stable@vger.kernel.org
Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230407083453.6305-5-lvjianmin@loongson.cn
---
 drivers/irqchip/irq-loongson-pch-pic.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-loongson-pch-pic.c b/drivers/irqchip/irq-loongson-pch-pic.c
index 437f1af..64fa67d 100644
--- a/drivers/irqchip/irq-loongson-pch-pic.c
+++ b/drivers/irqchip/irq-loongson-pch-pic.c
@@ -311,7 +311,8 @@ static int pch_pic_init(phys_addr_t addr, unsigned long size, int vec_base,
 	pch_pic_handle[nr_pics] = domain_handle;
 	pch_pic_priv[nr_pics++] = priv;
 
-	register_syscore_ops(&pch_pic_syscore_ops);
+	if (nr_pics == 1)
+		register_syscore_ops(&pch_pic_syscore_ops);
 
 	return 0;
 

  reply	other threads:[~2023-04-08 10:47 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-07  8:34 [PATCH V3 0/5] Fix some issues of irq controllers for dual-bridges scenario Jianmin Lv
2023-04-07  8:34 ` [PATCH V3 1/5] irqchip/loongson-eiointc: Fix returned value on parsing MADT Jianmin Lv
2023-04-08 10:45   ` [irqchip: irq/irqchip-next] " irqchip-bot for Jianmin Lv
2023-04-07  8:34 ` [PATCH V3 2/5] irqchip/loongson-eiointc: Fix incorrect use of acpi_get_vec_parent Jianmin Lv
2023-04-08 10:45   ` [irqchip: irq/irqchip-next] " irqchip-bot for Jianmin Lv
2023-04-07  8:34 ` [PATCH V3 3/5] irqchip/loongson-eiointc: Fix registration of syscore_ops Jianmin Lv
2023-04-08 10:45   ` [irqchip: irq/irqchip-next] " irqchip-bot for Jianmin Lv
2023-04-07  8:34 ` [PATCH V3 4/5] irqchip/loongson-pch-pic: " Jianmin Lv
2023-04-08 10:45   ` irqchip-bot for Jianmin Lv [this message]
2023-04-07  8:34 ` [PATCH V3 5/5] irqchip/loongson-pch-pic: Fix pch_pic_acpi_init calling Jianmin Lv
2023-04-08 10:45   ` [irqchip: irq/irqchip-next] " irqchip-bot for Jianmin Lv
2023-04-09  1:44 ` [PATCH V3 0/5] Fix some issues of irq controllers for dual-bridges scenario Huacai Chen

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