mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: "irqchip-bot for Anup Patel" <tip-bot2@linutronix.de>
To: linux-kernel@vger.kernel.org
Cc: Anup Patel <apatel@ventanamicro.com>,
	Palmer Dabbelt <palmer@rivosinc.com>,
	Marc Zyngier <maz@kernel.org>,
	tglx@linutronix.de
Subject: [irqchip: irq/irqchip-next] irqchip/riscv-intc: Add empty irq_eoi() for chained irq handlers
Date: Sat, 08 Apr 2023 10:45:16 -0000	[thread overview]
Message-ID: <168095071647.404.805771641857569861.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20230328035223.1480939-8-apatel@ventanamicro.com>

The following commit has been merged into the irq/irqchip-next branch of irqchip:

Commit-ID:     f8415f2def181c63486e93c511b82692e0914d9e
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/f8415f2def181c63486e93c511b82692e0914d9e
Author:        Anup Patel <apatel@ventanamicro.com>
AuthorDate:    Tue, 28 Mar 2023 09:22:23 +05:30
Committer:     Marc Zyngier <maz@kernel.org>
CommitterDate: Sat, 08 Apr 2023 11:26:24 +01:00

irqchip/riscv-intc: Add empty irq_eoi() for chained irq handlers

We add empty irq_eoi() in RISC-V INTC driver for child irqchip
drivers (such as PLIC, SBI IPI, CLINT, APLIC, IMSIC, etc) which
implement chained handlers for parent per-HART local interrupts.
This hels us avoid unnecessary mask/unmask of per-HART local
interrupts at the time of handling interrupts.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230328035223.1480939-8-apatel@ventanamicro.com
---
 drivers/irqchip/irq-riscv-intc.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c
index 784d256..f229e3e 100644
--- a/drivers/irqchip/irq-riscv-intc.c
+++ b/drivers/irqchip/irq-riscv-intc.c
@@ -46,10 +46,27 @@ static void riscv_intc_irq_unmask(struct irq_data *d)
 	csr_set(CSR_IE, BIT(d->hwirq));
 }
 
+static void riscv_intc_irq_eoi(struct irq_data *d)
+{
+	/*
+	 * The RISC-V INTC driver uses handle_percpu_devid_irq() flow
+	 * for the per-HART local interrupts and child irqchip drivers
+	 * (such as PLIC, SBI IPI, CLINT, APLIC, IMSIC, etc) implement
+	 * chained handlers for the per-HART local interrupts.
+	 *
+	 * In the absence of irq_eoi(), the chained_irq_enter() and
+	 * chained_irq_exit() functions (used by child irqchip drivers)
+	 * will do unnecessary mask/unmask of per-HART local interrupts
+	 * at the time of handling interrupts. To avoid this, we provide
+	 * an empty irq_eoi() callback for RISC-V INTC irqchip.
+	 */
+}
+
 static struct irq_chip riscv_intc_chip = {
 	.name = "RISC-V INTC",
 	.irq_mask = riscv_intc_irq_mask,
 	.irq_unmask = riscv_intc_irq_unmask,
+	.irq_eoi = riscv_intc_irq_eoi,
 };
 
 static int riscv_intc_domain_map(struct irq_domain *d, unsigned int irq,

  reply	other threads:[~2023-04-08 10:49 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-28  3:52 [PATCH v18 0/7] RISC-V IPI Improvements Anup Patel
2023-03-28  3:52 ` [PATCH v18 1/7] RISC-V: Clear SIP bit only when using SBI IPI operations Anup Patel
2023-04-08 10:45   ` [irqchip: irq/irqchip-next] " irqchip-bot for Anup Patel
2023-03-28  3:52 ` [PATCH v18 2/7] irqchip/riscv-intc: Allow drivers to directly discover INTC hwnode Anup Patel
2023-04-08 10:45   ` [irqchip: irq/irqchip-next] " irqchip-bot for Anup Patel
2023-03-28  3:52 ` [PATCH v18 3/7] RISC-V: Treat IPIs as normal Linux IRQs Anup Patel
2023-04-08 10:45   ` [irqchip: irq/irqchip-next] " irqchip-bot for Anup Patel
2023-03-28  3:52 ` [PATCH v18 4/7] RISC-V: Allow marking IPIs as suitable for remote FENCEs Anup Patel
2023-04-08 10:45   ` [irqchip: irq/irqchip-next] " irqchip-bot for Anup Patel
2023-03-28  3:52 ` [PATCH v18 5/7] RISC-V: Use IPIs for remote TLB flush when possible Anup Patel
2023-04-08 10:45   ` [irqchip: irq/irqchip-next] " irqchip-bot for Anup Patel
2023-03-28  3:52 ` [PATCH v18 6/7] RISC-V: Use IPIs for remote icache " Anup Patel
2023-04-08 10:45   ` [irqchip: irq/irqchip-next] " irqchip-bot for Anup Patel
2023-03-28  3:52 ` [PATCH v18 7/7] irqchip/riscv-intc: Add empty irq_eoi() for chained irq handlers Anup Patel
2023-04-08 10:45   ` irqchip-bot for Anup Patel [this message]
2023-03-28  3:56 ` [PATCH v18 0/7] RISC-V IPI Improvements Anup Patel
2023-05-08 14:41 ` patchwork-bot+linux-riscv

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=168095071647.404.805771641857569861.tip-bot2@tip-bot2 \
    --to=tip-bot2@linutronix.de \
    --cc=apatel@ventanamicro.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=maz@kernel.org \
    --cc=palmer@rivosinc.com \
    --cc=tglx@linutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®