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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id p82-20020acad855000000b00383ef567cfdsm1984996oig.21.2023.04.21.13.54.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 13:54:52 -0700 (PDT) Received: (nullmailer pid 1750051 invoked by uid 1000); Fri, 21 Apr 2023 20:54:51 -0000 Date: Fri, 21 Apr 2023 15:54:51 -0500 From: Rob Herring To: Jim Quinlan Cc: linux-rpi-kernel@lists.infradead.org, Lorenzo Pieralisi , Lorenzo Pieralisi , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Phil Elwell , james.quinlan@broadcom.com, Cyril Brulebois , Florian Fainelli , Nicolas Saenz Julienne , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Bjorn Helgaas , bcm-kernel-feedback-list@broadcom.com Subject: Re: [PATCH v3 1/3] dt-bindings: PCI: brcmstb: brcm,{enable-l1ss,completion-timeout-us} props Message-ID: <168211049118.1749998.10567032742795047284.robh@kernel.org> References: <20230419165721.29533-1-jim2101024@gmail.com> <20230419165721.29533-2-jim2101024@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230419165721.29533-2-jim2101024@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 19 Apr 2023 12:57:18 -0400, Jim Quinlan wrote: > This commit introduces two new properties: > > brcm,enable-l1ss (bool): > > The Broadcom STB/CM PCIe HW -- a core that is also used by RPi SOCs -- > requires the driver probe() to deliberately place the HW one of three > CLKREQ# modes: > > (a) CLKREQ# driven by the RC unconditionally > (b) CLKREQ# driven by the EP for ASPM L0s, L1 > (c) Bidirectional CLKREQ#, as used for L1 Substates (L1SS). > > The HW+driver can tell the difference between downstream devices that > need (a) and (b), but does not know when to configure (c). All devices > should work fine when the driver chooses (a) or (b), but (c) may be > desired to realize the extra power savings that L1SS offers. So we > introduce the boolean "brcm,enable-l1ss" property to inform the driver > that (c) is desired. Setting this property only makes sense when the > downstream device is L1SS-capable and the OS is configured to activate > this mode (e.g. policy==superpowersave). > > This property is already present in the Raspian version of Linux, but the > upstream driver implementaion that follows adds more details and discerns > between (a) and (b). > > brcm,completion-timeout-us (u32): > > Our HW will cause a CPU abort on any PCI transaction completion abort > error. It makes sense then to increase the timeout value for this type > of error in hopes that the response is merely delayed. Further, > L1SS-capable devices may have a long L1SS exit time and may require a > custom timeout value: we've been asked by our customers to make this > configurable for just this reason. > > Signed-off-by: Jim Quinlan > --- > .../devicetree/bindings/pci/brcm,stb-pcie.yaml | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > Reviewed-by: Rob Herring