From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9914C001B0 for ; Fri, 11 Aug 2023 11:45:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236142AbjHKLpQ (ORCPT ); Fri, 11 Aug 2023 07:45:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44236 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235462AbjHKLpK (ORCPT ); Fri, 11 Aug 2023 07:45:10 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1D8E0FA for ; Fri, 11 Aug 2023 04:45:10 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id B1C6B67064 for ; Fri, 11 Aug 2023 11:45:09 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7EB23C433CC; Fri, 11 Aug 2023 11:45:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691754309; bh=/19kLQzk3e8nwz3P9BU6eSzy1lY4GmblwpCPrLRiBmU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PhiGAQKcJNLX6VMrh+qGpnI+pRu0mCl/Z8fkXvt+QJE6FGVcrdS924pWYUyJ8IsE+ z51ovhdQKjvPjr7ZuPIydUP47ot1kgXgIlNnYpgxNWPdVEo157h7q8usca/8NFHNFc rfOLvdpQg9X3Qyoxy7tXSU/IcU/JrsZoGaSavxi/aRoPcEqMZ76B4yZ2LsxalLUgKI 5VU4SInhbyr0otkcTseaIKu6z9bBQgLGR/kohHfXGa4SgMaOMerMzNi6cT55pQACUv YEzze21kd7Fjo2a8Mej2w7wzhNOF4GnqSb9KapFQ8k58lAxoEukCMT3iSiqW0YYimB oShm78h7IwvMw== From: Will Deacon To: Dave Martin , Mark Brown , Suzuki K Poulose , Catalin Marinas Cc: kernel-team@android.com, Will Deacon , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] arm64/fpsimd: Only provide the length to cpufeature for xCR registers Date: Fri, 11 Aug 2023 12:44:53 +0100 Message-Id: <169165967155.2189311.11595342536402277516.b4-ty@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20230731-arm64-sme-fa64-hotplug-v2-1-7714c00dd902@kernel.org> References: <20230731-arm64-sme-fa64-hotplug-v2-1-7714c00dd902@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 31 Jul 2023 14:58:48 +0100, Mark Brown wrote: > For both SVE and SME we abuse the generic register field comparison > support in the cpufeature code as part of our detection of unsupported > variations in the vector lengths available to PEs, reporting the maximum > vector lengths via ZCR_EL1.LEN and SMCR_EL1.LEN. Since these are > configuration registers rather than identification registers the > assumptions the cpufeature code makes about how unknown bitfields behave > are invalid, leading to warnings when SME features like FA64 are enabled > and we hotplug a CPU: > > [...] Applied to arm64 (for-next/cpufeature), thanks! [1/1] arm64/fpsimd: Only provide the length to cpufeature for xCR registers https://git.kernel.org/arm64/c/01948b09edc3 Cheers, -- Will https://fixes.arm64.dev https://next.arm64.dev https://will.arm64.dev