From: Doug Ledford <dledford@redhat.com>
To: Lijun Ou <oulijun@huawei.com>,
sean.hefty@intel.com, hal.rosenstock@gmail.com,
davem@davemloft.net, jeffrey.t.kirsher@intel.com,
jiri@mellanox.com, ogerlitz@mellanox.com
Cc: linux-rdma@vger.kernel.org, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org, gongyangming@huawei.com,
xiaokun@huawei.com, tangchaofei@huawei.com,
haifeng.wei@huawei.com, yisen.zhuang@huawei.com,
yankejian@huawei.com, charles.chenxin@huawei.com,
linuxarm@huawei.com
Subject: Re: [RESEND PATCH v7 17/21] IB/hns: Add QP operations support
Date: Fri, 13 May 2016 18:04:00 -0400 [thread overview]
Message-ID: <16fc19ea-308a-ceee-d2da-4de93c66e2d7@redhat.com> (raw)
In-Reply-To: <1462849483-67927-18-git-send-email-oulijun@huawei.com>
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On 05/09/2016 11:04 PM, Lijun Ou wrote:
> +static void hns_roce_v1_cq_clean(struct hns_roce_cq *hr_cq, u32 qpn,
> + struct hns_roce_srq *srq)
> +{
> + spin_lock_irq(&hr_cq->lock);
> + hns_roce_v1_clean_cq(hr_cq, qpn, srq);
> + spin_unlock_irq(&hr_cq->lock);
> +}
This is a perfect example of what I was talking about in my last email.
The convention here would be to name the main function
__hns_roce_v1_cq_clean and the wrapper hns_roce_v1_cq_clean. Instead,
you have one named cq_clean and one named clean_cq. Keeping straight
which of those locks itself and which needs to be called with the lock
held is nigh impossible.
--
Doug Ledford <dledford@redhat.com>
GPG KeyID: 0E572FDD
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next prev parent reply other threads:[~2016-05-13 22:04 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-10 3:04 [RESEND PATCH v7 00/21] Add HiSilicon RoCE driver Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 01/21] net: hns: Add reset function support for " Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 02/21] devicetree: bindings: IB: Add binding document for HiSilicon RoCE Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 03/21] IB/hns: Add initial main frame driver and get cfg info Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 04/21] IB/hns: Add RoCE engine reset function Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 05/21] IB/hns: Add initial profile resource Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 06/21] IB/hns: Add initial cmd operation Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 07/21] IB/hns: Add event queue support Lijun Ou
2016-05-13 21:21 ` Doug Ledford
2016-05-10 3:04 ` [RESEND PATCH v7 08/21] IB/hns: Add icm support Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 09/21] IB/hns: Add hca support Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 10/21] IB/hns: Add process flow to init RoCE engine Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 11/21] IB/hns: Add IB device registration Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 12/21] IB/hns: Set mtu and gid support Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 13/21] IB/hns: Add interface of the protocol stack registration Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 14/21] IB/hns: Add operations support for IB device and port Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 15/21] IB/hns: Add PD operations support Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 16/21] IB/hns: Add ah " Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 17/21] IB/hns: Add QP " Lijun Ou
2016-05-13 21:52 ` Doug Ledford
2016-05-23 3:30 ` Wei Hu (Xavier)
2016-05-13 22:04 ` Doug Ledford [this message]
2016-05-10 3:04 ` [RESEND PATCH v7 18/21] IB/hns: Add CQ " Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 19/21] IB/hns: Add memory region " Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 20/21] IB/hns: Kconfig and Makefile for RoCE module Lijun Ou
2016-05-10 3:04 ` [RESEND PATCH v7 21/21] MAINTAINERS: Add maintainers for HiSilicon RoCE driver Lijun Ou
2016-05-13 21:09 ` [RESEND PATCH v7 00/21] Add " Doug Ledford
2016-05-23 1:06 ` Wei Hu (Xavier)
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