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From: Rob Herring <robh@kernel.org>
To: Yang Xiwen <forbidden405@outlook.com>
Cc: Stephen Boyd <sboyd@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	 David Yang <mmyangfl@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	 linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	 linux-kernel@vger.kernel.org,
	Michael Turquette <mturquette@baylibre.com>,
	 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Subject: Re: [PATCH RFC 4/4] dt-binding: clock: hisilicon,clock-reset-controller: add Hi3798MV200 SoC support
Date: Fri, 16 Feb 2024 07:11:16 -0600	[thread overview]
Message-ID: <170808907492.2771271.5272601820598116325.robh@kernel.org> (raw)
In-Reply-To: <20240216-clk-mv200-v1-4-a29ace29e636@outlook.com>


On Fri, 16 Feb 2024 19:37:54 +0800, Yang Xiwen wrote:
> This SoC is similar to Hi3798CV200.
> 
> Also document the specific DLL regs and add an example for it.
> 
> Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
> ---
>  .../clock/hisilicon,clock-reset-generator.yaml     | 36 ++++++++++++++++++++++
>  1 file changed, 36 insertions(+)
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/clock/hisilicon,clock-reset-generator.example.dtb: /example-2/clock-reset-controller@8a22000/sap-dll@39c: failed to match any schema with compatible: ['hisilicon,sdmmc-sap-dll', 'syscon', 'simple-mfd']
Documentation/devicetree/bindings/clock/hisilicon,clock-reset-generator.example.dtb: /example-2/clock-reset-controller@8a22000/sap-dll@3a4: failed to match any schema with compatible: ['hisilicon,sdmmc-sap-dll', 'syscon', 'simple-mfd']
Documentation/devicetree/bindings/clock/hisilicon,clock-reset-generator.example.dtb: /example-2/clock-reset-controller@8a22000/sap-dll@3ac: failed to match any schema with compatible: ['hisilicon,sdmmc-sap-dll', 'syscon', 'simple-mfd']

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20240216-clk-mv200-v1-4-a29ace29e636@outlook.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.


  reply	other threads:[~2024-02-16 13:11 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-16 11:37 [PATCH RFC 0/4] clk: hisilicon: add support for Hi3798MV200 Yang Xiwen via B4 Relay
2024-02-16 11:37 ` [PATCH RFC 1/4] dt-binding: clock: histb-clock: Add missing common clock and Hi3798MV200 specific clock definition Yang Xiwen via B4 Relay
2024-02-17 10:09   ` Krzysztof Kozlowski
2024-02-16 11:37 ` [PATCH RFC 2/4] clk: hisilicon: add CRG driver for Hi3798MV200 SoC Yang Xiwen via B4 Relay
2024-02-16 11:37 ` [PATCH RFC 3/4] dt-binding: clock: merge all hisilicon clock bindings to hisilicon,clock-reset-generator Yang Xiwen via B4 Relay
2024-02-22 20:14   ` Rob Herring
2024-02-22 23:24     ` Yang Xiwen
2024-02-16 11:37 ` [PATCH RFC 4/4] dt-binding: clock: hisilicon,clock-reset-controller: add Hi3798MV200 SoC support Yang Xiwen via B4 Relay
2024-02-16 13:11   ` Rob Herring [this message]
2024-02-18 20:57   ` Rob Herring

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