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From: Paolo Abeni <pabeni@redhat.com>
To: Daniel Golle <daniel@makrotopia.org>,
	Vladimir Oltean <olteanv@gmail.com>
Cc: Hauke Mehrtens <hauke@hauke-m.de>, Andrew Lunn <andrew@lunn.ch>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	Rasmus Villemoes <ravi@prevas.dk>,
	"Benny (Ying-Tsan) Weng" <yweng@maxlinear.com>
Subject: Re: [PATCH net-next] net: dsa: mxl-gsw1xx: fix SerDes RX polarity
Date: Thu, 4 Dec 2025 13:29:06 +0100	[thread overview]
Message-ID: <171b63b4-44f1-40e3-a1ba-a504c77a3d6b@redhat.com> (raw)
In-Reply-To: <aTDJNvLR9evdCaDl@makrotopia.org>

On 12/4/25 12:35 AM, Daniel Golle wrote:
> On Wed, Dec 03, 2025 at 11:49:59AM +0200, Vladimir Oltean wrote:
>> On Tue, Dec 02, 2025 at 09:57:21AM +0000, Daniel Golle wrote:
>>> According to MaxLinear engineer Benny Weng the RX lane of the SerDes
>>> port of the GSW1xx switches is inverted in hardware, and the
>>> SGMII_PHY_RX0_CFG2_INVERT bit is set by default in order to compensate
>>> for that. Hence also set the SGMII_PHY_RX0_CFG2_INVERT bit by default in
>>> gsw1xx_pcs_reset().
>>>
>>> Fixes: 22335939ec90 ("net: dsa: add driver for MaxLinear GSW1xx switch family")
>>> Reported-by: Rasmus Villemoes <ravi@prevas.dk>
>>> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
>>> ---
>>
>> This shouldn't impact the generic device tree property work, since as
>> stated there, there won't be any generically imposed default polarity if
>> the device tree property is missing.
>>
>> We can perhaps use this thread to continue a philosophical debate on how
>> should the device tree deal with this situation of internally inverted
>> polarities (what does PHY_POL_NORMAL mean: the observable behaviour at
>> the external pins, or the hardware IP configuration?). I have more or
>> less the same debate going on with the XPCS polarity as set by
>> nxp_sja1105_sgmii_pma_config().
> 
> In this case it is really just a bug in the datasheet, because the
> switch does set the GSW1XX_SGMII_PHY_RX0_CFG2_INVERT bit by default
> after reset, which results in RX polarity to be as expected (ie.
> negative and positive pins as labeled).
> 
> However, the driver was overwriting the register content which resulted
> in the polarity being inverted (despite the fact that the
> GSW1XX_SGMII_PHY_RX0_CFG2_INVERT wasn't set, because it is actually
> inverted internally, which just isn't well documented).
> 
>>
>> But the patch itself seems fine regardless of these side discussions.
> 
> As net-next-6.19 has been tagged by now, should I resend the patch
> via 'net' tree after the tag was merged?

Not needed, I'm applying this patch to net directly.

Thanks,

Paolo


  parent reply	other threads:[~2025-12-04 12:29 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-02  9:57 Daniel Golle
2025-12-03  9:49 ` Vladimir Oltean
2025-12-03 23:35   ` Daniel Golle
2025-12-04  9:03     ` Rasmus Villemoes
2025-12-04 12:29     ` Paolo Abeni [this message]
2025-12-04 12:40 ` patchwork-bot+netdevbpf

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