From: "tip-bot2 for Marek Behún" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: kabel@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Andrew Lunn <andrew@lunn.ch>,
x86@kernel.org, linux-kernel@vger.kernel.org, maz@kernel.org
Subject: [tip: irq/core] irqchip/armada-370-xp: Use BIT() and GENMASK() macros
Date: Mon, 29 Jul 2024 09:49:47 -0000 [thread overview]
Message-ID: <172224658704.2215.13748374301568914524.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20240708151801.11592-5-kabel@kernel.org>
The following commit has been merged into the irq/core branch of tip:
Commit-ID: 3587a763f2faf0fe4004d5103e573f0700f89e50
Gitweb: https://git.kernel.org/tip/3587a763f2faf0fe4004d5103e573f0700f89e50
Author: Marek Behún <kabel@kernel.org>
AuthorDate: Mon, 08 Jul 2024 17:17:55 +02:00
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Mon, 29 Jul 2024 10:57:21 +02:00
irqchip/armada-370-xp: Use BIT() and GENMASK() macros
Use the BIT() and GENMASK() macros where appropriate.
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/all/20240708151801.11592-5-kabel@kernel.org
---
drivers/irqchip/irq-armada-370-xp.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index 427ba5f..18aca9b 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -121,7 +121,7 @@
#define ARMADA_370_XP_INT_SET_ENABLE (0x30)
#define ARMADA_370_XP_INT_CLEAR_ENABLE (0x34)
#define ARMADA_370_XP_INT_SOURCE_CTL(irq) (0x100 + irq*4)
-#define ARMADA_370_XP_INT_SOURCE_CPU_MASK 0xF
+#define ARMADA_370_XP_INT_SOURCE_CPU_MASK GENMASK(3, 0)
#define ARMADA_370_XP_INT_IRQ_FIQ_MASK(cpuid) ((BIT(0) | BIT(8)) << cpuid)
/* Registers relative to per_cpu_int_base */
@@ -132,18 +132,18 @@
#define ARMADA_370_XP_INT_SET_MASK (0x48)
#define ARMADA_370_XP_INT_CLEAR_MASK (0x4C)
#define ARMADA_370_XP_INT_FABRIC_MASK (0x54)
-#define ARMADA_370_XP_INT_CAUSE_PERF(cpu) (1 << cpu)
+#define ARMADA_370_XP_INT_CAUSE_PERF(cpu) BIT(cpu)
#define ARMADA_370_XP_MAX_PER_CPU_IRQS (28)
/* IPI and MSI interrupt definitions for IPI platforms */
#define IPI_DOORBELL_START (0)
#define IPI_DOORBELL_END (8)
-#define IPI_DOORBELL_MASK 0xFF
+#define IPI_DOORBELL_MASK GENMASK(7, 0)
#define PCI_MSI_DOORBELL_START (16)
#define PCI_MSI_DOORBELL_NR (16)
#define PCI_MSI_DOORBELL_END (32)
-#define PCI_MSI_DOORBELL_MASK 0xFFFF0000
+#define PCI_MSI_DOORBELL_MASK GENMASK(31, 16)
/* MSI interrupt definitions for non-IPI platforms */
#define PCI_MSI_FULL_DOORBELL_START 0
@@ -415,7 +415,7 @@ static void armada_370_xp_ipi_send_mask(struct irq_data *d,
/* Convert our logical CPU mask into a physical one. */
for_each_cpu(cpu, mask)
- map |= 1 << cpu_logical_map(cpu);
+ map |= BIT(cpu_logical_map(cpu));
/*
* Ensure that stores to Normal memory are visible to the
next parent reply other threads:[~2024-07-29 9:49 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20240708151801.11592-5-kabel@kernel.org>
2024-07-29 9:49 ` tip-bot2 for Marek Behún [this message]
2024-07-30 11:40 ` tip-bot2 for Marek Behún
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