From: "tip-bot2 for Marek Behún" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: kabel@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
x86@kernel.org, linux-kernel@vger.kernel.org, maz@kernel.org
Subject: [tip: irq/core] irqchip/armada-370-xp: Iterate only valid bits of the per-CPU interrupt cause register
Date: Thu, 08 Aug 2024 15:21:43 -0000 [thread overview]
Message-ID: <172313050328.2215.7248961297324909574.tip-bot2@tip-bot2> (raw)
The following commit has been merged into the irq/core branch of tip:
Commit-ID: 4042a965a5e62c8d298d642cbf72b14f41687319
Gitweb: https://git.kernel.org/tip/4042a965a5e62c8d298d642cbf72b14f41687319
Author: Marek Behún <kabel@kernel.org>
AuthorDate: Wed, 07 Aug 2024 18:41:02 +02:00
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Thu, 08 Aug 2024 17:15:01 +02:00
irqchip/armada-370-xp: Iterate only valid bits of the per-CPU interrupt cause register
Use MPIC_PER_CPU_IRQS_NR (29) bound instead of BITS_PER_LONG (32) when
iterating the bits of the per-CPU interrupt cause register, since there
are only 29 per-CPU interrupts. The top 3 bits are always zero anyway.
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
drivers/irqchip/irq-armada-370-xp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index 83afc3a..36d1bac 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -678,7 +678,7 @@ static void mpic_handle_cascade_irq(struct irq_desc *desc)
cause = readl_relaxed(mpic->per_cpu + MPIC_PPI_CAUSE);
cpuid = cpu_logical_map(smp_processor_id());
- for_each_set_bit(i, &cause, BITS_PER_LONG) {
+ for_each_set_bit(i, &cause, MPIC_PER_CPU_IRQS_NR) {
irqsrc = readl_relaxed(mpic->base + MPIC_INT_SOURCE_CTL(i));
/* Check if the interrupt is not masked on current CPU.
reply other threads:[~2024-08-08 15:21 UTC|newest]
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