From: Andrew Jeffery <andrew@codeconstruct.com.au>
To: patrick@stwcx.xyz, Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Joel Stanley <joel@jms.id.au>,
devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 0/2] Adjust the setting for SPI flash of yosemite4
Date: Wed, 25 Sep 2024 10:22:17 +0930 [thread overview]
Message-ID: <172722553796.384629.2084285836291139720.b4-ty@codeconstruct.com.au> (raw)
In-Reply-To: <20240924094430.272074-1-Delphine_CC_Chiu@wiwynn.com>
On Tue, 24 Sep 2024 17:44:28 +0800, Delphine CC Chiu wrote:
> - v2
> - Split the patches for different targets.
> - v1
> - Revise SPI flash to dual mode.
> - Revise flash layout to 128MB.
>
> Ricky CX Wu (2):
> ARM: dts: aspeed: yosemite4: Revise quad mode to dual mode
> ARM: dts: aspeed: yosemite4: revise flash layout to 128MB
>
> [...]
Thanks, I've applied this to be picked up through the BMC tree.
--
Andrew Jeffery <andrew@codeconstruct.com.au>
prev parent reply other threads:[~2024-09-25 0:52 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-24 9:44 Delphine CC Chiu
2024-09-24 9:44 ` [PATCH v2 1/2] ARM: dts: aspeed: yosemite4: Revise quad mode to dual mode Delphine CC Chiu
2024-09-24 9:44 ` [PATCH v2 2/2] ARM: dts: aspeed: yosemite4: revise flash layout to 128MB Delphine CC Chiu
2024-09-25 0:52 ` Andrew Jeffery [this message]
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