Re: [PATCH] [v3]mtd: spi-nor: winbond: add 1.8v SPI NOR Flash IDs

[<Tudor.Ambarus@microchip.com>]

On 5/28/20 6:36 AM, wuxy@bitland.com.cn wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> From: wuxy <wuxy@bitland.corp-partner.google.com>
> 
> Winbond has new 1.8V SPI NOR Flash IDs,we need to use the SPI
> flash IDs in kukui series,this patch can support the new flash IDs.

Which flashes were tested?

One should do a read, dump the content, erase, dump content to check that
erase was fine, write a random generated file, read back and compare.

I see that you added the locking flags too. Were the locking ops tested?

We don't add flashes or caps that are not tested, please specify in the
commit message what was tested.

> 
> Signed-off-by: Xingyu Wu <wuxy@bitland.corp-partner.google.com>
> Signed-off-by: ST Lin <stlin2@winbond.com>
> Test-by: Nicolas Boichat <drinkcat@chromium.org>
> 
> ---
> This patch copied from:https://patchwork.ozlabs.org/patch/1150756/,
> The original patch is invalid,so re-submit a new patch for this.
>  drivers/mtd/spi-nor/winbond.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
> index 17deabad57e1..cda4f8847bd6 100644
> --- a/drivers/mtd/spi-nor/winbond.c
> +++ b/drivers/mtd/spi-nor/winbond.c
> @@ -61,6 +61,15 @@ static const struct flash_info winbond_parts[] = {
>                              SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
>         { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024,
>                             SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) },
> +       { "w25q64jwxxIM", INFO(0xef8017, 0, 64 * 1024, 128,

We don't really care about the Package Type, it does not change the flash
caps, we can drop "xx" from the name. Also, the manufacturer can introduce
new flashes with different temperature ranges without changing the
flash caps, so we should drop the "I" from the name too.

The flash name would become w25q64jwm

> +                           SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> +                           SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) },
> +       { "w25q128jwxxIM", INFO(0xef8018, 0, 64 * 1024, 256,

w25q128jwm

> +                           SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> +                           SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) },
> +       { "w25q256jwxxIM", INFO(0xef8019, 0, 64 * 1024, 512,

w25q256jwm

> +                           SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> +                           SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) },

w25q256jwm has 4 block protection bits, locking was not tested for this flash.

Cheers,
ta