From: Bjorn Andersson <andersson@kernel.org>
To: Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Jingyi Wang <quic_jingyw@quicinc.com>,
Konrad Dybcio <konradybcio@kernel.org>,
Lijuan Gao <quic_lijuang@quicinc.com>
Cc: kernel@quicinc.com, linux-arm-msm@vger.kernel.org,
linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Subject: Re: (subset) [PATCH v2 0/6] Correct the number of GPIOs in gpio-ranges for QCS615 and QCS8300
Date: Tue, 7 Jan 2025 10:38:45 -0600 [thread overview]
Message-ID: <173626793401.69400.2278973364367185634.b4-ty@kernel.org> (raw)
In-Reply-To: <20241219-correct_gpio_ranges-v2-0-19af8588dbd0@quicinc.com>
On Thu, 19 Dec 2024 15:59:42 +0800, Lijuan Gao wrote:
> The UFS_RESET pin on Qualcomm SoCs are controlled by TLMM and exposed
> through the GPIO framework. It is expected to be wired to the reset pin
> of the primary UFS memory so that the UFS driver can toggle it.
>
> The UFS_RESET pin is exported as GPIOs in addtion to the real GPIOs. The
> QCS615 TLMM pin controller has GPIOs 0-122, so correct the gpio-rangs to
> 124. The QCS8300 TLMM pin controller has GPIOs 0-132, so correct the
> gpio-rangs to 134.
>
> [...]
Applied, thanks!
[5/6] arm64: dts: qcom: correct gpio-ranges for QCS615
commit: 80c82827327d80bde8fc96ebd4e637d0454062db
[6/6] arm64: dts: qcom: correct gpio-ranges for QCS8300
commit: c57c39ee522d873db2cb23486581a8269c389cfe
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
prev parent reply other threads:[~2025-01-07 16:39 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-19 7:59 Lijuan Gao
2024-12-19 7:59 ` [PATCH v2 1/6] dt-bindings: pinctrl: qcom: correct gpio-ranges in examples for qcs615 Lijuan Gao
2024-12-19 8:15 ` Krzysztof Kozlowski
2024-12-19 9:30 ` Lijuan Gao
2024-12-19 7:59 ` [PATCH v2 2/6] dt-bindings: pinctrl: qcom: correct gpio-ranges in examples for qcs8300 Lijuan Gao
2024-12-19 7:59 ` [PATCH v2 3/6] pinctrl: qcom: correct the ngpios entry for QCS615 Lijuan Gao
2024-12-19 18:57 ` Konrad Dybcio
2024-12-19 7:59 ` [PATCH v2 4/6] pinctrl: qcom: correct the ngpios entry for QCS8300 Lijuan Gao
2024-12-19 18:58 ` Konrad Dybcio
2024-12-19 7:59 ` [PATCH v2 5/6] arm64: dts: qcom: correct gpio-ranges for QCS615 Lijuan Gao
2024-12-19 18:58 ` Konrad Dybcio
2024-12-19 7:59 ` [PATCH v2 6/6] arm64: dts: qcom: correct gpio-ranges for QCS8300 Lijuan Gao
2024-12-19 18:58 ` Konrad Dybcio
2024-12-22 8:53 ` [PATCH v2 0/6] Correct the number of GPIOs in gpio-ranges for QCS615 and QCS8300 Linus Walleij
2025-01-07 16:38 ` Bjorn Andersson [this message]
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