From: "tip-bot2 for Yazen Ghannam" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Yazen Ghannam <yazen.ghannam@amd.com>,
"Borislav Petkov (AMD)" <bp@alien8.de>,
x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: x86/misc] x86/amd_nb: Simplify function 4 search
Date: Thu, 09 Jan 2025 09:15:42 -0000 [thread overview]
Message-ID: <173641414241.399.3246889531031987277.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20241206161210.163701-6-yazen.ghannam@amd.com>
The following commit has been merged into the x86/misc branch of tip:
Commit-ID: 962f1970a32430ce6c75ea23cbc59d68346481fd
Gitweb: https://git.kernel.org/tip/962f1970a32430ce6c75ea23cbc59d68346481fd
Author: Yazen Ghannam <yazen.ghannam@amd.com>
AuthorDate: Fri, 06 Dec 2024 16:11:58
Committer: Borislav Petkov (AMD) <bp@alien8.de>
CommitterDate: Wed, 08 Jan 2025 10:47:50 +01:00
x86/amd_nb: Simplify function 4 search
Use the newly added helper function to look up a CPU/Node function to
find "function 4" devices.
Thus, avoid the need to regularly add new PCI IDs for basic discovery.
The unique PCI IDs are still useful in case of quirks or functional
changes. And they should be used only in such a manner.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20241206161210.163701-6-yazen.ghannam@amd.com
---
arch/x86/include/asm/amd_nb.h | 2 +-
arch/x86/kernel/amd_nb.c | 66 +---------------------------------
2 files changed, 4 insertions(+), 64 deletions(-)
diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x86/include/asm/amd_nb.h
index d0caac2..b48dc69 100644
--- a/arch/x86/include/asm/amd_nb.h
+++ b/arch/x86/include/asm/amd_nb.h
@@ -4,7 +4,7 @@
#include <linux/ioport.h>
#include <linux/pci.h>
-#include <linux/refcount.h>
+#include <asm/amd_node.h>
struct amd_nb_bus_dev_range {
u8 bus;
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index ee20071..7a62c5a 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -30,26 +30,6 @@
#define PCI_DEVICE_ID_AMD_MI200_ROOT 0x14bb
#define PCI_DEVICE_ID_AMD_MI300_ROOT 0x14f8
-#define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464
-#define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec
-#define PCI_DEVICE_ID_AMD_17H_M30H_DF_F4 0x1494
-#define PCI_DEVICE_ID_AMD_17H_M60H_DF_F4 0x144c
-#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F4 0x1444
-#define PCI_DEVICE_ID_AMD_17H_MA0H_DF_F4 0x1728
-#define PCI_DEVICE_ID_AMD_19H_DF_F4 0x1654
-#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F4 0x14b1
-#define PCI_DEVICE_ID_AMD_19H_M40H_DF_F4 0x167d
-#define PCI_DEVICE_ID_AMD_19H_M50H_DF_F4 0x166e
-#define PCI_DEVICE_ID_AMD_19H_M60H_DF_F4 0x14e4
-#define PCI_DEVICE_ID_AMD_19H_M70H_DF_F4 0x14f4
-#define PCI_DEVICE_ID_AMD_19H_M78H_DF_F4 0x12fc
-#define PCI_DEVICE_ID_AMD_1AH_M00H_DF_F4 0x12c4
-#define PCI_DEVICE_ID_AMD_1AH_M20H_DF_F4 0x16fc
-#define PCI_DEVICE_ID_AMD_1AH_M60H_DF_F4 0x124c
-#define PCI_DEVICE_ID_AMD_1AH_M70H_DF_F4 0x12bc
-#define PCI_DEVICE_ID_AMD_MI200_DF_F4 0x14d4
-#define PCI_DEVICE_ID_AMD_MI300_DF_F4 0x152c
-
/* Protect the PCI config register pairs used for SMN. */
static DEFINE_MUTEX(smn_mutex);
@@ -73,8 +53,6 @@ static const struct pci_device_id amd_root_ids[] = {
{}
};
-#define PCI_DEVICE_ID_AMD_CNB17H_F4 0x1704
-
static const struct pci_device_id amd_nb_misc_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) },
@@ -107,35 +85,6 @@ static const struct pci_device_id amd_nb_misc_ids[] = {
{}
};
-static const struct pci_device_id amd_nb_link_ids[] = {
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_M60H_NB_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_DF_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_MA0H_DF_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_DF_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M60H_DF_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M70H_DF_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M78H_DF_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M00H_DF_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M20H_DF_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M60H_DF_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M70H_DF_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI200_DF_F4) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI300_DF_F4) },
- {}
-};
-
static const struct pci_device_id hygon_root_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_ROOT) },
{}
@@ -146,11 +95,6 @@ static const struct pci_device_id hygon_nb_misc_ids[] = {
{}
};
-static const struct pci_device_id hygon_nb_link_ids[] = {
- { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_DF_F4) },
- {}
-};
-
const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[] __initconst = {
{ 0x00, 0x18, 0x20 },
{ 0xff, 0x00, 0x20 },
@@ -275,13 +219,11 @@ int __must_check amd_smn_write(u16 node, u32 address, u32 value)
}
EXPORT_SYMBOL_GPL(amd_smn_write);
-
static int amd_cache_northbridges(void)
{
const struct pci_device_id *misc_ids = amd_nb_misc_ids;
- const struct pci_device_id *link_ids = amd_nb_link_ids;
const struct pci_device_id *root_ids = amd_root_ids;
- struct pci_dev *root, *misc, *link;
+ struct pci_dev *root, *misc;
struct amd_northbridge *nb;
u16 roots_per_misc = 0;
u16 misc_count = 0;
@@ -294,7 +236,6 @@ static int amd_cache_northbridges(void)
if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
root_ids = hygon_root_ids;
misc_ids = hygon_nb_misc_ids;
- link_ids = hygon_nb_link_ids;
}
misc = NULL;
@@ -328,14 +269,13 @@ static int amd_cache_northbridges(void)
amd_northbridges.nb = nb;
amd_northbridges.num = misc_count;
- link = misc = root = NULL;
+ misc = root = NULL;
for (i = 0; i < amd_northbridges.num; i++) {
node_to_amd_nb(i)->root = root =
next_northbridge(root, root_ids);
node_to_amd_nb(i)->misc = misc =
next_northbridge(misc, misc_ids);
- node_to_amd_nb(i)->link = link =
- next_northbridge(link, link_ids);
+ node_to_amd_nb(i)->link = amd_node_get_func(i, 4);
/*
* If there are more PCI root devices than data fabric/
next prev parent reply other threads:[~2025-01-09 9:15 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-06 16:11 [PATCH v2 00/16] AMD NB and SMN rework Yazen Ghannam
2024-12-06 16:11 ` [PATCH v2 01/16] x86/mce/amd: Remove shared threshold bank plumbing Yazen Ghannam
2025-01-03 18:18 ` [tip: ras/core] " tip-bot2 for Yazen Ghannam
2024-12-06 16:11 ` [PATCH v2 02/16] x86/amd_nb: Restrict init function to AMD-based systems Yazen Ghannam
2025-01-09 9:15 ` [tip: x86/misc] " tip-bot2 for Yazen Ghannam
2024-12-06 16:11 ` [PATCH v2 03/16] x86/amd_nb: Clean up early_is_amd_nb() Yazen Ghannam
2025-01-09 9:15 ` [tip: x86/misc] " tip-bot2 for Yazen Ghannam
2024-12-06 16:11 ` [PATCH v2 04/16] x86: Start moving AMD Node functionality out of AMD_NB Yazen Ghannam
2025-01-09 9:15 ` [tip: x86/misc] x86: Start moving AMD node " tip-bot2 for Yazen Ghannam
2024-12-06 16:11 ` [PATCH v2 05/16] x86/amd_nb: Simplify function 4 search Yazen Ghannam
2025-01-09 9:15 ` tip-bot2 for Yazen Ghannam [this message]
2024-12-06 16:11 ` [PATCH v2 06/16] x86/amd_nb: Simplify root device search Yazen Ghannam
2025-01-09 9:15 ` [tip: x86/misc] " tip-bot2 for Yazen Ghannam
2024-12-06 16:12 ` [PATCH v2 07/16] x86/amd_nb: Use topology info to get AMD node count Yazen Ghannam
2024-12-06 16:12 ` [PATCH v2 08/16] x86/amd_nb: Simplify function 3 search Yazen Ghannam
2024-12-06 16:12 ` [PATCH v2 09/16] x86/amd_nb, hwmon: (k10temp): Simplify amd_pci_dev_to_node_id() Yazen Ghannam
2024-12-06 16:38 ` Guenter Roeck
2025-01-09 9:15 ` [tip: x86/misc] " tip-bot2 for Mario Limonciello
2024-12-06 16:12 ` [PATCH v2 10/16] x86/amd_nb: Move SMN access code to a new amd_node driver Yazen Ghannam
2024-12-09 13:35 ` Ilpo Järvinen
2025-01-09 9:15 ` [tip: x86/misc] " tip-bot2 for Mario Limonciello
2024-12-06 16:12 ` [PATCH v2 11/16] x86/amd_node: Update __amd_smn_rw() error paths Yazen Ghannam
2025-01-09 9:15 ` [tip: x86/misc] " tip-bot2 for Yazen Ghannam
2024-12-06 16:12 ` [PATCH v2 12/16] x86/amd_node: Remove dependency on AMD_NB Yazen Ghannam
2025-01-09 9:15 ` [tip: x86/misc] " tip-bot2 for Yazen Ghannam
2024-12-06 16:12 ` [PATCH v2 13/16] x86/amd_node: Use defines for SMN register offsets Yazen Ghannam
2025-01-09 9:15 ` [tip: x86/misc] " tip-bot2 for Yazen Ghannam
2024-12-06 16:12 ` [PATCH v2 14/16] x86/amd_node, platform/x86/amd/hsmp: Have HSMP use SMN through AMD_NODE Yazen Ghannam
2024-12-09 13:32 ` Ilpo Järvinen
2024-12-11 16:13 ` Yazen Ghannam
2024-12-12 17:27 ` [PATCH v2.1] " Yazen Ghannam
2024-12-12 18:50 ` Ilpo Järvinen
2024-12-12 21:46 ` Yazen Ghannam
2024-12-16 13:57 ` Ilpo Järvinen
2024-12-13 15:22 ` [PATCH v2.2] " Yazen Ghannam
2024-12-14 10:05 ` Borislav Petkov
2024-12-16 18:33 ` Yazen Ghannam
2024-12-24 1:14 ` Suma Hegde
2025-01-02 20:04 ` Yazen Ghannam
2024-12-06 16:12 ` [PATCH v2 15/16] x86/amd_node: Add SMN offsets to exclusive region access Yazen Ghannam
2024-12-06 16:12 ` [PATCH v2 16/16] x86/amd_node: Add support for debugfs access to SMN registers Yazen Ghannam
2025-01-03 21:49 ` [PATCH v2 00/16] AMD NB and SMN rework Borislav Petkov
2025-01-06 15:38 ` Yazen Ghannam
2025-01-06 16:31 ` Yazen Ghannam
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