From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 03E6A1EE028; Fri, 21 Feb 2025 22:58:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740178687; cv=none; b=PT/Bpx2lCmnlX80D96smwAR9Bj2f2tAauI8IsIQCtT2w7gP/1g1k6x4NQ4i8+XjCDZ1rZybPBIKDtca9xUFbZnZzXW216w65Lau9yPQpUUa0eBdAZJBjFAcFsGum1y/NMzxfOek7ePPatFUUtnVCi116t7oyFXS/8ks02PJ3eI0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740178687; c=relaxed/simple; bh=UD1mJc3L2/1M1eMRVEKmlNYviOU+pPZbwPDjudm8YBg=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=U6PZWLzW+v9ILkCGQd5abSMDK5sBnWmMY5BXc7X7r1LJZelfUGZSXVzSjcZTstHmydBWAem6n1JX3oyv5YrlQbmZwNVCBZdaH96GVAKAzdqmXwtN3Q/tN+gG4RQuLKx8JtEHmm5mVXLwMESAodZYa/EwvhjJ/vMsveu9zAF+bpU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nRmW6HFe; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nRmW6HFe" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4604FC4CED6; Fri, 21 Feb 2025 22:58:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1740178686; bh=UD1mJc3L2/1M1eMRVEKmlNYviOU+pPZbwPDjudm8YBg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=nRmW6HFetk9gBcJVjmGedrpzJc9A5xydWmGgUh72T7lAekfxLErtovTbwri7P6iWX 9UpIEdRt4wWFLLz+i05k8TMksdeLUu/AnBTFceKjeUKU3HyDcQdVt42LBkR99aoTS9 9w5KKoRClz6TH5MDMLblw7fg+1uscFK6m8bzj7SAHNHeQr01+JEIz6FVAjUq4TfjOx 6yKWSE9D9fiWAV/qs+aFIiseALoM4d5P1SSRP0X2UWgORso08uI5MEeAo+eEHpKrGc dlf/bIAkk2+VV+9t1I/9fZH9n4YXh6OLkUWsS4c52sLAm992bUDUG4zyiAywOtxuj5 ZfspYHi4bM9sw== Date: Fri, 21 Feb 2025 16:58:04 -0600 From: "Rob Herring (Arm)" To: Oleksij Rempel Cc: Paolo Abeni , Eric Dumazet , devicetree@vger.kernel.org, Alexandre Torgue , Woojung Huh , kernel@pengutronix.de, Andrew Lunn , Conor Dooley , linux-stm32@st-md-mailman.stormreply.com, netdev@vger.kernel.org, Maxime Coquelin , Krzysztof Kozlowski , linux-kernel@vger.kernel.org, "David S. Miller" , Jakub Kicinski Subject: Re: [PATCH v3 2/3] dt-bindings: arm: stm32: Add Plymovent AQM board Message-ID: <174017868413.223507.11279781037859848554.robh@kernel.org> References: <20250220090155.2937620-1-o.rempel@pengutronix.de> <20250220090155.2937620-3-o.rempel@pengutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250220090155.2937620-3-o.rempel@pengutronix.de> On Thu, 20 Feb 2025 10:01:54 +0100, Oleksij Rempel wrote: > Add support for the Plymovent AQM board based on the ST STM32MP151 SoC > to the STM32 devicetree bindings. > > Signed-off-by: Oleksij Rempel > --- > changes v3: > - fix alphabetical order > --- > Documentation/devicetree/bindings/arm/stm32/stm32.yaml | 1 + > 1 file changed, 1 insertion(+) > Reviewed-by: Rob Herring (Arm)