From: William Breathitt Gray <wbg@kernel.org>
To: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Cc: William Breathitt Gray <wbg@kernel.org>,
alexandre.torgue@foss.st.com, olivier.moysan@foss.st.com,
linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com
Subject: Re: [PATCH] counter: stm32-lptimer-cnt: fix error handling when enabling
Date: Tue, 4 Mar 2025 19:28:42 +0900 [thread overview]
Message-ID: <174108402893.227977.9200776572329997415.b4-ty@kernel.org> (raw)
In-Reply-To: <20250224170657.3368236-1-fabrice.gasnier@foss.st.com>
On Mon, 24 Feb 2025 18:06:57 +0100, Fabrice Gasnier wrote:
> In case the stm32_lptim_set_enable_state() fails to update CMP and ARR,
> a timeout error is raised, by regmap_read_poll_timeout. It may happen,
> when the lptimer runs on a slow clock, and the clock is gated only
> few times during the polling.
>
> Badly, when this happen, STM32_LPTIM_ENABLE in CR register has been set.
> So the 'enable' state in sysfs wrongly lies on the counter being
> correctly enabled, due to CR is read as one in stm32_lptim_is_enabled().
>
> [...]
Applied, thanks!
[1/1] counter: stm32-lptimer-cnt: fix error handling when enabling
commit: 8744dcd4fc7800de2eb9369410470bb2930d4c14
Best regards,
--
William Breathitt Gray <wbg@kernel.org>
prev parent reply other threads:[~2025-03-04 10:29 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-24 17:06 Fabrice Gasnier
2025-03-04 10:28 ` William Breathitt Gray [this message]
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