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From: Bjorn Andersson <andersson@kernel.org>
To: Konrad Dybcio <konradybcio@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Jishnu Prakash <quic_jprakash@quicinc.com>,
	Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>,
	Taniya Das <quic_tdas@quicinc.com>,
	Melody Olvera <quic_molvera@quicinc.com>,
	Maulik Shah <maulik.shah@oss.qualcomm.com>
Cc: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
	linux-arm-msm@vger.kernel.org,
	devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	quic_lsrao@quicinc.com
Subject: Re: [PATCH v2] arm64: dts: qcom: sm8750: Fix cluster hierarchy for idle states
Date: Fri, 14 Mar 2025 15:00:59 -0500
Message-ID: <174198247880.1604753.1528173788448249349.b4-ty@kernel.org>
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On Wed, 26 Feb 2025 12:21:27 +0530, Maulik Shah wrote:
> SM8750 have two different clusters. cluster0 have CPU 0-5 as child and
> cluster1 have CPU 6-7 as child. Each cluster requires its own idle state
> and power domain in order to achieve complete domain sleep state.
> 
> However only single cluster idle state is added mapping CPU 0-7 to the
> same power domain. Fix this by correctly mapping each CPU to respective
> cluster power domain and make cluster1 power domain use same domain idle
> state as cluster0 since both use same idle state parameters.
> 
> [...]

Applied, thanks!

[1/1] arm64: dts: qcom: sm8750: Fix cluster hierarchy for idle states
      commit: 778dc0f876c70b3d781a49981560ec88e1b7083a

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>