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Tue, 29 Apr 2025 23:11:37 -0700 (PDT) From: Inochi Amaoto To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Ze Huang Cc: Inochi Amaoto , devicetree@vger.kernel.org, sophgo@lists.linux.dev, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Yu Yuan , Ze Huang Subject: Re: [PATCH] riscv: dts: sophgo: fix DMA data-width configuration for CV18xx Date: Wed, 30 Apr 2025 14:11:19 +0800 Message-ID: <174599347430.640588.3561713391476977843.b4-ty@gmail.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250428-duo-dma-config-v1-1-eb6ad836ca42@whut.edu.cn> References: <20250428-duo-dma-config-v1-1-eb6ad836ca42@whut.edu.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit On Mon, 28 Apr 2025 17:24:36 +0800, Ze Huang wrote: > The "snps,data-width" property[1] defines the AXI data width of the DMA > controller as: > > width = 8 × (2^n) bits > > (0 = 8 bits, 1 = 16 bits, 2 = 32 bits, ..., 6 = 512 bits) > where "n" is the value of "snps,data-width". > > [...] Applied to fixes, thanks! [1/1] riscv: dts: sophgo: fix DMA data-width configuration for CV18xx https://github.com/sophgo/linux/commit/32b3f9d3e57bb4bd2204a6a4305b9f899f725859 Thanks, Inochi