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From: "tip-bot2 for Kan Liang" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Kan Liang <kan.liang@linux.intel.com>,
	"Peter Zijlstra (Intel)" <peterz@infradead.org>,
	x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: perf/core] perf/x86: Optimize the is_x86_event
Date: Wed, 30 Apr 2025 11:58:45 -0000	[thread overview]
Message-ID: <174601432586.22196.10566021473087857537.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20250424134718.311934-5-kan.liang@linux.intel.com>

The following commit has been merged into the perf/core branch of tip:

Commit-ID:     3e830f657f69ab6a4822d72ec2f364c6d51beef8
Gitweb:        https://git.kernel.org/tip/3e830f657f69ab6a4822d72ec2f364c6d51beef8
Author:        Kan Liang <kan.liang@linux.intel.com>
AuthorDate:    Thu, 24 Apr 2025 06:47:17 -07:00
Committer:     Peter Zijlstra <peterz@infradead.org>
CommitterDate: Fri, 25 Apr 2025 14:55:22 +02:00

perf/x86: Optimize the is_x86_event

The current is_x86_event has to go through the hybrid_pmus list to find
the matched pmu, then check if it's a X86 PMU and a X86 event. It's not
necessary.

The X86 PMU has a unique type ID on a non-hybrid machine, and a unique
capability type. They are good enough to do the check.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20250424134718.311934-5-kan.liang@linux.intel.com
---
 arch/x86/events/core.c | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index b2762f2..92c3fb6 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -762,15 +762,16 @@ void x86_pmu_enable_all(int added)
 
 int is_x86_event(struct perf_event *event)
 {
-	int i;
-
-	if (!is_hybrid())
-		return event->pmu == &pmu;
-
-	for (i = 0; i < x86_pmu.num_hybrid_pmus; i++) {
-		if (event->pmu == &x86_pmu.hybrid_pmu[i].pmu)
-			return true;
-	}
+	/*
+	 * For a non-hybrid platforms, the type of X86 pmu is
+	 * always PERF_TYPE_RAW.
+	 * For a hybrid platform, the PERF_PMU_CAP_EXTENDED_HW_TYPE
+	 * is a unique capability for the X86 PMU.
+	 * Use them to detect a X86 event.
+	 */
+	if (event->pmu->type == PERF_TYPE_RAW ||
+	    event->pmu->capabilities & PERF_PMU_CAP_EXTENDED_HW_TYPE)
+		return true;
 
 	return false;
 }

  reply	other threads:[~2025-04-30 11:58 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-24 13:47 [PATCH V2 0/5] Several fixes for group flag and counters-snapshotting kan.liang
2025-04-24 13:47 ` [PATCH V2 1/5] perf/x86/intel: Only check the group flag for X86 leader kan.liang
2025-04-30 11:58   ` [tip: perf/core] " tip-bot2 for Kan Liang
2025-04-24 13:47 ` [PATCH V2 2/5] perf/x86/intel: Check the X86 leader for pebs_counter_event_group kan.liang
2025-04-30 11:58   ` [tip: perf/core] " tip-bot2 for Kan Liang
2025-04-24 13:47 ` [PATCH V2 3/5] perf/x86/intel: Check the X86 leader for ACR group kan.liang
2025-04-30 11:58   ` [tip: perf/core] " tip-bot2 for Kan Liang
2025-04-24 13:47 ` [PATCH V2 4/5] perf/x86: Optimize the is_x86_event kan.liang
2025-04-30 11:58   ` tip-bot2 for Kan Liang [this message]
2025-04-24 13:47 ` [PATCH V2 5/5] perf/x86/intel/ds: Fix counter backwards of non-precise events counters-snapshotting kan.liang
2025-04-30 11:58   ` [tip: perf/core] " tip-bot2 for Kan Liang
2025-04-24 14:25 ` [PATCH V2 0/5] Several fixes for group flag and counters-snapshotting Peter Zijlstra
2025-04-24 16:00   ` Liang, Kan
2025-04-25 12:55     ` Peter Zijlstra
2025-04-25 13:54       ` Liang, Kan

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