From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 640F32980BC; Wed, 14 May 2025 21:04:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747256679; cv=none; b=qCZ3yxxlg+Q/tF6LJ0qrny6NMgdv7qM3Yw9AX3BCaaunH1yDQvD8JkYFdnxQXXPaRM/M0+mBFyYqL1xBg6Rm/VUd78PQS7EP+/Xq6CQlGIu5mUR6HzCNcILyGj0jGeXDxR35RHPmxQ0dTL2vYXfqtw12vLSOIJ2o0ciMNJo5cik= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747256679; c=relaxed/simple; bh=s2u2b8c5FrqPvRHZEXaSPt1HFS70iOZgwHrtFP+mqes=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=VQUg3m65T9y7caBQFsIL5lKjSPjKpIsn8/8zXDoGKG7tsPrXgjpjx4gHdjp7E/y9+nxkaepmayRrcK9kcdJYQV7xDv110OoFXdK5PT2YL42aa5pBtrSWD6wu0yK2r5IiMkQjghVEc+G/wnYTwsVVL9FQlxTrdsmLIT9ls9lZjxA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Nh5garwq; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Nh5garwq" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 67D37C4CEED; Wed, 14 May 2025 21:04:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747256678; bh=s2u2b8c5FrqPvRHZEXaSPt1HFS70iOZgwHrtFP+mqes=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Nh5garwqQyEz4FPZg4q8hTBDmokrAbS6jZyBbymLjVcZYyqfFF+NKnSL64izuF6n7 k+wVLTU20nL94j/1j7rXxN1LwI6xZbFkFVmC3PtbrpVa7MqXXzn7s8MXhMEWYpWb6I wIrAVgeVM6lIyTOcQQcdeBpSfPOd9SGqXTzmQjPayrWiWGMx7KU0FFtBqZjqy3Vff9 bIdHHXchzOlMDCHEsjDCgLU9aqJLxBF1jDg9JY2johXNEE6f9cPhVZ2ZuLWC5WIdg5 1P+RUhP8KM6B8y22IvPpJdokeL3n/LSmD2+60XbJG7QaXXxx5Zn/tvJr0O1qw/c0mH WYPLmuFBZFZLA== From: Bjorn Andersson To: Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Pengyu Luo Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] arm64: dts: qcom: sm8650: add the missing l2 cache node Date: Wed, 14 May 2025 22:03:51 +0100 Message-ID: <174725663059.90041.12352596711820703957.b4-ty@kernel.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250405105529.309711-1-mitltlatltl@gmail.com> References: <20250405105529.309711-1-mitltlatltl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit On Sat, 05 Apr 2025 18:55:28 +0800, Pengyu Luo wrote: > Only two little a520s share the same L2, every a720 has their own L2 > cache. > > Applied, thanks! [1/1] arm64: dts: qcom: sm8650: add the missing l2 cache node commit: 4becd72352b6861de0c24074a8502ca85080fd63 Best regards, -- Bjorn Andersson